Showing results 7 to 25 of 25
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| Title | Author(s) | Issue Date | Views | |
|---|---|---|---|---|
Configurable Architecture for Double/Two-Parallel Single Precision Floating Point Division Proceeding/Conference:IEEE Computer Society Annual Symposium on VLSI (ISVLSI) | 2014 | 34 | ||
Configurable Architectures For Multi-mode Floating Point Adders Journal:IEEE Transactions On Circuits And Systems I: Regular Papers | 2015 | 36 | ||
Design of quadruple precision multiplier architectures with SIMD single and double precision support Journal:Integration: the VLSI journal | 2019 | 17 | ||
Design space explorations of Hybrid-Partitioned TCAM (HP-TCAM) Proceeding/Conference:International Conference on Field Programmable Logic and Applications | 2013 | 41 | ||
DSP48E efficient floating point multiplier architectures on FPGA Proceeding/Conference:International Conference on VLSI Design & International Conference on Embedded Systems (VLSID) | 2017 | 56 | ||
Dual-Mode Double Precision / Two-Parallel Single Precision Floating Point Multiplier Architecture Proceeding/Conference:IFIP International Conference on Very Large Scale Integration (VLSI-SoC) | 2015 | 40 | ||
Dual-mode double precision division architecture Proceeding/Conference:International Midwest Symposium on Circuits and Systems Conference Proceedings | 2016 | 36 | ||
E-TCAM: An Efficient SRAM-Based Architecture for TCAM Journal:Circuits, Systems, and Signal Processing | 2014 | 55 | ||
Fast Content Updating Algorithm For An Sram-based Tcam On Fpga Journal:IEEE Embedded Systems Letters | 2018 | 26 | ||
High-throughput cellular imaging with high-speed asymmetric-detection time-stretch optical microscopy under FPGA platform Proceeding/Conference:IEEE International Conference on Reconfigurable Computing and FPGAs (ReConFig) | 2016 | 51 | ||
PACoGen: A Hardware Posit Arithmetic Core Generator Journal:IEEE Access | 2019 | 17 | ||
Real-time object detection and classification for high-speed asymmetric-detection time-stretch optical microscopy on FPGA Proceeding/Conference:IEEE International Conference on FieId-Programmable Technology Proceedings | 2016 | 12 | ||
Series Expansion based Efficient Architectures for Double Precision Floating Point Division Journal:Circuits, Systems, and Signal Processing | 2014 | 38 | ||
Taylor series based architecture for Quadruple Precision Floating Point Division Proceeding/Conference:IEEE Computer Society Annual Symposium on VLSI | 2016 | 57 | ||
UE-TCAM: an ultra efficient SRAM-based TCAM Proceeding/Conference:TENCON (IEEE Region 10 Conference) Proceedings | 2015 | 33 | ||
Unified Architecture for Double/Two-Parallel Single Precision Floating Point Adder Journal:IEEE Transactions on Circuits and Systems II: Express Briefs | 2014 | 44 | ||
Universal number posit arithmetic generator on FPGA Proceeding/Conference:Design, Automation, and Test in Europe Conference and Exhibition Proceedings | 2018 | 86 | ||
VLSI Implementation of Double-Precision Floating-Point Multiplier Using Karatsuba Technique Journal:Circuits, Systems, and Signal Processing | 2013 | 50 | ||
Z-TCAM: An SRAM-based Architecture for TCAM Journal:IEEE Transactions on Very Large Scale Integration Systems | 2015 | 70 |