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Article: RAID-M: A high performance RAID Matrix mass storage

TitleRAID-M: A high performance RAID Matrix mass storage
Authors
KeywordsPci
Raid
Raid Matrix
Raid-M
Storage
Issue Date2005
PublisherScience in China Press. The Journal's web site is located at http://www.scienceinchina.com/scienceinchina_f_en.htm
Citation
Science In China, Series F: Information Sciences, 2005, v. 48 n. 4, p. 409-420 How to Cite?
AbstractIn the light of the increasingly serious I/O bottleneck problem, the paper puts forward a method named RAID-M (RAID Matrix) to build high performance mass storage from cheap PC components based on the idea of multi-channel I/O and parallel access. Theoretical analyses prove that different RAID-M configurations vary their performance, space utilization and reliability, meeting various application goals. Experiments show that both the sequential read performance and sequential write performance of a RAID-M prototype machine have broken through the limitation of 32 bit/33 MHz PCI bus. Copyright by Science in China Press 2005.
Persistent Identifierhttp://hdl.handle.net/10722/152342
ISSN
2011 Impact Factor: 0.656
ISI Accession Number ID
References

 

DC FieldValueLanguage
dc.contributor.authorLiu, Pen_US
dc.contributor.authorLi, Sen_US
dc.contributor.authorLau, FCMen_US
dc.contributor.authorShi, Yen_US
dc.contributor.authorHuang, Fen_US
dc.date.accessioned2012-06-26T06:37:19Z-
dc.date.available2012-06-26T06:37:19Z-
dc.date.issued2005en_US
dc.identifier.citationScience In China, Series F: Information Sciences, 2005, v. 48 n. 4, p. 409-420en_US
dc.identifier.issn1009-2757en_US
dc.identifier.urihttp://hdl.handle.net/10722/152342-
dc.description.abstractIn the light of the increasingly serious I/O bottleneck problem, the paper puts forward a method named RAID-M (RAID Matrix) to build high performance mass storage from cheap PC components based on the idea of multi-channel I/O and parallel access. Theoretical analyses prove that different RAID-M configurations vary their performance, space utilization and reliability, meeting various application goals. Experiments show that both the sequential read performance and sequential write performance of a RAID-M prototype machine have broken through the limitation of 32 bit/33 MHz PCI bus. Copyright by Science in China Press 2005.en_US
dc.languageengen_US
dc.publisherScience in China Press. The Journal's web site is located at http://www.scienceinchina.com/scienceinchina_f_en.htmen_US
dc.relation.ispartofScience in China, Series F: Information Sciencesen_US
dc.subjectPcien_US
dc.subjectRaiden_US
dc.subjectRaid Matrixen_US
dc.subjectRaid-Men_US
dc.subjectStorageen_US
dc.titleRAID-M: A high performance RAID Matrix mass storageen_US
dc.typeArticleen_US
dc.identifier.emailLau, FCM:fcmlau@cs.hku.hken_US
dc.identifier.authorityLau, FCM=rp00221en_US
dc.description.naturelink_to_subscribed_fulltexten_US
dc.identifier.doi10.1360/04yf0060en_US
dc.identifier.scopuseid_2-s2.0-33746346432en_US
dc.identifier.hkuros103561-
dc.identifier.hkuros103900-
dc.relation.referenceshttp://www.scopus.com/mlt/select.url?eid=2-s2.0-33746346432&selection=ref&src=s&origin=recordpageen_US
dc.identifier.volume48en_US
dc.identifier.issue4en_US
dc.identifier.spage409en_US
dc.identifier.epage420en_US
dc.identifier.isiWOS:000231865400001-
dc.publisher.placeChinaen_US
dc.identifier.scopusauthoridLiu, P=36066694100en_US
dc.identifier.scopusauthoridLi, S=7409236532en_US
dc.identifier.scopusauthoridLau, FCM=7102749723en_US
dc.identifier.scopusauthoridShi, Y=7404964722en_US
dc.identifier.scopusauthoridHuang, F=55238921300en_US
dc.identifier.issnl1009-2757-

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