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- Publisher Website: 10.1109/CLOUDCOM-ASIA.2013.68
- Scopus: eid_2-s2.0-84904549705
- WOS: WOS:000355658800011
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Conference Paper: Latency-aware dynamic voltage and frequency scaling on many-core architectures for data-intensive applications
Title | Latency-aware dynamic voltage and frequency scaling on many-core architectures for data-intensive applications |
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Authors | |
Keywords | Algorithm Data-intensive DVFS Graph 500 Latency-aware Power management |
Issue Date | 2013 |
Publisher | IEEE Computer Society. The Journal's web site is located at http://ieeexplore.ieee.org/xpl/conhome.jsp?punumber=1803725 |
Citation | The 2013 International Conference on Cloud Computing and Big Data (Cloudcom-Asia 2013), Fuzhou, Fujian, China, 16-18 December 2013. In Conference Proceedings, 2013, p. 78-83 How to Cite? |
Abstract | Low power is an important design requirement for HPC systems nowadays. Dynamic voltage and frequency scaling (DVFS) has become the commonly used and efficient technology to achieve a trade-off between power consumption and system performance. However, most of the prior work using DVFS did not take into account the latency of voltage/frequency scaling, which is a critical factor in real hardware determining the efficiency of the power management algorithm. This paper investigates the latency aspects of DVFS on a real many-core hardware platform. We propose a latency-aware DVFS algorithm to achieve profile-guided power management to avoid aggressive power state transitions. We evaluate our algorithm on the Intel SCC platform using a data-intensive benchmark, Graph 500. The experimental results not only show impressive potential for energy saving in data-intensive applications (up to 31% energy saving and 60% EDP reduction), but also evaluate the efficiency of our latency-aware DVFS algorithm which achieves 12.0% extra energy saving and 5.0% extra EDP reduction, while increasing the execution performance by 22.4%. © 2014 IEEE. |
Persistent Identifier | http://hdl.handle.net/10722/203647 |
ISBN | |
ISI Accession Number ID |
DC Field | Value | Language |
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dc.contributor.author | Lai, Z | en_US |
dc.contributor.author | Lam, KT | en_US |
dc.contributor.author | Wang, CL | en_US |
dc.contributor.author | Su, J | en_US |
dc.contributor.author | Yan, Y | en_US |
dc.contributor.author | Zhu, W | en_US |
dc.date.accessioned | 2014-09-19T15:49:09Z | - |
dc.date.available | 2014-09-19T15:49:09Z | - |
dc.date.issued | 2013 | en_US |
dc.identifier.citation | The 2013 International Conference on Cloud Computing and Big Data (Cloudcom-Asia 2013), Fuzhou, Fujian, China, 16-18 December 2013. In Conference Proceedings, 2013, p. 78-83 | en_US |
dc.identifier.isbn | 978-1-4799-2829-3 | - |
dc.identifier.uri | http://hdl.handle.net/10722/203647 | - |
dc.description.abstract | Low power is an important design requirement for HPC systems nowadays. Dynamic voltage and frequency scaling (DVFS) has become the commonly used and efficient technology to achieve a trade-off between power consumption and system performance. However, most of the prior work using DVFS did not take into account the latency of voltage/frequency scaling, which is a critical factor in real hardware determining the efficiency of the power management algorithm. This paper investigates the latency aspects of DVFS on a real many-core hardware platform. We propose a latency-aware DVFS algorithm to achieve profile-guided power management to avoid aggressive power state transitions. We evaluate our algorithm on the Intel SCC platform using a data-intensive benchmark, Graph 500. The experimental results not only show impressive potential for energy saving in data-intensive applications (up to 31% energy saving and 60% EDP reduction), but also evaluate the efficiency of our latency-aware DVFS algorithm which achieves 12.0% extra energy saving and 5.0% extra EDP reduction, while increasing the execution performance by 22.4%. © 2014 IEEE. | en_US |
dc.language | eng | en_US |
dc.publisher | IEEE Computer Society. The Journal's web site is located at http://ieeexplore.ieee.org/xpl/conhome.jsp?punumber=1803725 | - |
dc.relation.ispartof | International Conference on Cloud Computing and Big Data (CloudCom-Asia) Proceedings | en_US |
dc.subject | Algorithm | - |
dc.subject | Data-intensive | - |
dc.subject | DVFS | - |
dc.subject | Graph 500 | - |
dc.subject | Latency-aware | - |
dc.subject | Power management | - |
dc.title | Latency-aware dynamic voltage and frequency scaling on many-core architectures for data-intensive applications | en_US |
dc.type | Conference_Paper | en_US |
dc.identifier.email | Lai, Z: zqlai@hku.hk | en_US |
dc.identifier.email | Lam, KT: kingtin@hku.hk | en_US |
dc.identifier.email | Wang, CL: clwang@cs.hku.hk | en_US |
dc.identifier.authority | Wang, CL=rp00183 | en_US |
dc.description.nature | link_to_subscribed_fulltext | - |
dc.identifier.doi | 10.1109/CLOUDCOM-ASIA.2013.68 | - |
dc.identifier.scopus | eid_2-s2.0-84904549705 | - |
dc.identifier.hkuros | 239053 | en_US |
dc.identifier.spage | 78 | - |
dc.identifier.epage | 83 | - |
dc.identifier.isi | WOS:000355658800011 | - |
dc.publisher.place | United States | - |
dc.customcontrol.immutable | sml 141003 | - |