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- Publisher Website: 10.1007/s11664-001-0062-7
- Scopus: eid_2-s2.0-0035392313
- WOS: WOS:000169911000005
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Article: Initial nanoheteroepitaxial growth of GaAs on Si(100) by OMVPE
Title | Initial nanoheteroepitaxial growth of GaAs on Si(100) by OMVPE |
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Authors | |
Keywords | Heteroepitaxy Growth initiation GaAs on Si Lattice mismatch |
Issue Date | 2001 |
Citation | Journal of Electronic Materials, 2001, v. 30, n. 7, p. 812-816 How to Cite? |
Abstract | Initial growth studies of GaAs on an array of Si islands nanostructured on (100) oriented silicon-on-insulator substrates show that growth occurs through a mixture of selective-area and 3D growth modes. An optimum initiation growth temperature must tune the growth conditions to the geometry of the seed array so that selective-area control is maintained while defect density is minimized. The optimum temperature for a square array of Si islands, 500 nm in pitch, and 100 nm to 280 nm in diameter, is ∼600°C. This temperature yields single-crystal nucleation on each Si island while maintaining selective-area growth mode control. Transmission electron microscope (TEM) analysis of optimized and non-optimized grown GaAs/Si heterostructures show that they accommodate 0.4-0.7% strain. Further reduction in stacking-fault defects attributed to side wall growth may be possible through masking of side wall or annealing. |
Persistent Identifier | http://hdl.handle.net/10722/294943 |
ISSN | 2023 Impact Factor: 2.2 2023 SCImago Journal Rankings: 0.439 |
ISI Accession Number ID |
DC Field | Value | Language |
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dc.contributor.author | Zubia, D. | - |
dc.contributor.author | Zhang, S. | - |
dc.contributor.author | Bommena, R. | - |
dc.contributor.author | Sun, X. | - |
dc.contributor.author | Brueck, S. R.J. | - |
dc.contributor.author | Hersee, S. D. | - |
dc.date.accessioned | 2021-01-05T04:58:43Z | - |
dc.date.available | 2021-01-05T04:58:43Z | - |
dc.date.issued | 2001 | - |
dc.identifier.citation | Journal of Electronic Materials, 2001, v. 30, n. 7, p. 812-816 | - |
dc.identifier.issn | 0361-5235 | - |
dc.identifier.uri | http://hdl.handle.net/10722/294943 | - |
dc.description.abstract | Initial growth studies of GaAs on an array of Si islands nanostructured on (100) oriented silicon-on-insulator substrates show that growth occurs through a mixture of selective-area and 3D growth modes. An optimum initiation growth temperature must tune the growth conditions to the geometry of the seed array so that selective-area control is maintained while defect density is minimized. The optimum temperature for a square array of Si islands, 500 nm in pitch, and 100 nm to 280 nm in diameter, is ∼600°C. This temperature yields single-crystal nucleation on each Si island while maintaining selective-area growth mode control. Transmission electron microscope (TEM) analysis of optimized and non-optimized grown GaAs/Si heterostructures show that they accommodate 0.4-0.7% strain. Further reduction in stacking-fault defects attributed to side wall growth may be possible through masking of side wall or annealing. | - |
dc.language | eng | - |
dc.relation.ispartof | Journal of Electronic Materials | - |
dc.subject | Heteroepitaxy | - |
dc.subject | Growth initiation | - |
dc.subject | GaAs on Si | - |
dc.subject | Lattice mismatch | - |
dc.title | Initial nanoheteroepitaxial growth of GaAs on Si(100) by OMVPE | - |
dc.type | Article | - |
dc.description.nature | link_to_subscribed_fulltext | - |
dc.identifier.doi | 10.1007/s11664-001-0062-7 | - |
dc.identifier.scopus | eid_2-s2.0-0035392313 | - |
dc.identifier.volume | 30 | - |
dc.identifier.issue | 7 | - |
dc.identifier.spage | 812 | - |
dc.identifier.epage | 816 | - |
dc.identifier.isi | WOS:000169911000005 | - |
dc.identifier.issnl | 0361-5235 | - |