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Conference Paper: MoS2 U-shape MOSFET with 10 nm channel length and poly-Si source/drain serving as seed for full wafer CVD MoS2 availability

TitleMoS<inf>2</inf> U-shape MOSFET with 10 nm channel length and poly-Si source/drain serving as seed for full wafer CVD MoS<inf>2</inf> availability
Authors
Issue Date2016
Citation
Digest of Technical Papers - Symposium on VLSI Technology, 2016, v. 2016-September, article no. 7573375 How to Cite?
AbstractA U-shape MoS pMOSFET with 10nm channel and poly-Si source/drain is demonstrated. The fabrication process is simple. Because the Si S/D serves as the nucleation seed for CVD MoS deposition, thin MoS is well deposited in the channel region any where over the fully scale oxide coated Si wafer. This is a big step forward toward a low cost multi-layer stacked TMD IC technology. 2 2 2
Persistent Identifierhttp://hdl.handle.net/10722/298177
ISSN
2023 SCImago Journal Rankings: 0.911

 

DC FieldValueLanguage
dc.contributor.authorLi, Kai Shin-
dc.contributor.authorWu, Bo Wei-
dc.contributor.authorLi, Lain Jong-
dc.contributor.authorLi, Ming Yang-
dc.contributor.authorCheng, Chia Chin Kevin-
dc.contributor.authorHsu, Cho Lun-
dc.contributor.authorLin, Chang Hsien-
dc.contributor.authorChen, Yi Ju-
dc.contributor.authorChen, Chun Chi-
dc.contributor.authorWu, Chien Ting-
dc.contributor.authorChen, Min Cheng-
dc.contributor.authorShieh, Jia Min-
dc.contributor.authorYeh, Wen Kuan-
dc.contributor.authorChueh, Yu Lun-
dc.contributor.authorYang, Fu Liang-
dc.contributor.authorHu, Chenming-
dc.date.accessioned2021-04-08T03:07:51Z-
dc.date.available2021-04-08T03:07:51Z-
dc.date.issued2016-
dc.identifier.citationDigest of Technical Papers - Symposium on VLSI Technology, 2016, v. 2016-September, article no. 7573375-
dc.identifier.issn0743-1562-
dc.identifier.urihttp://hdl.handle.net/10722/298177-
dc.description.abstractA U-shape MoS pMOSFET with 10nm channel and poly-Si source/drain is demonstrated. The fabrication process is simple. Because the Si S/D serves as the nucleation seed for CVD MoS deposition, thin MoS is well deposited in the channel region any where over the fully scale oxide coated Si wafer. This is a big step forward toward a low cost multi-layer stacked TMD IC technology. 2 2 2-
dc.languageeng-
dc.relation.ispartofDigest of Technical Papers - Symposium on VLSI Technology-
dc.titleMoS<inf>2</inf> U-shape MOSFET with 10 nm channel length and poly-Si source/drain serving as seed for full wafer CVD MoS<inf>2</inf> availability-
dc.typeConference_Paper-
dc.description.naturelink_to_subscribed_fulltext-
dc.identifier.doi10.1109/VLSIT.2016.7573375-
dc.identifier.scopuseid_2-s2.0-84990966345-
dc.identifier.volume2016-September-
dc.identifier.spagearticle no. 7573375-
dc.identifier.epagearticle no. 7573375-
dc.identifier.issnl0743-1562-

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