File Download

There are no files associated with this item.

  Links for fulltext
     (May Require Subscription)
Supplementary

Article: Multilayer Graphene-WSe2 Heterostructures for WSe2 Transistors

TitleMultilayer Graphene-WSe<inf>2</inf> Heterostructures for WSe<inf>2</inf> Transistors
Authors
Keywordstransistor
transition metal dichalcogenides
heterostructure
graphene
contact
WSe 2
Issue Date2017
Citation
ACS Nano, 2017, v. 11, n. 12, p. 12817-12823 How to Cite?
AbstractTwo-dimensional (2D) materials are drawing growing attention for next-generation electronics and optoelectronics owing to its atomic thickness and unique physical properties. One of the challenges posed by 2D materials is the large source/drain (S/D) series resistance due to their thinness, which may be resolved by thickening the source and drain regions. Recently explored lateral graphene-MoS 1-3 and graphene-WS 1,4 heterostructures shed light on resolving the mentioned issues owing to their superior ohmic contact behaviors. However, recently reported field-effect transistors (FETs) based on graphene-TMD heterostructures have only shown n-type characteristics. The lack of p-type transistor limits their applications in complementary metal-oxide semiconductor electronics. In this work, we demonstrate p-type FETs based on graphene-WSe lateral heterojunctions grown with the scalable CVD technique. Few-layer WSe is overlapped with the multilayer graphene (MLG) at MLG-WSe junctions such that the contact resistance is reduced. Importantly, the few-layer WSe only forms at the junction region while the channel is still maintained as a WSe monolayer for transistor operation. Furthermore, by imposing doping to graphene S/D, 2 orders of magnitude enhancement in I /I ratio to ∼10 and the unipolar p-type characteristics are obtained regardless of the work function of the metal in ambient air condition. The MLG is proposed to serve as a 2D version of emerging raised source/drain approach in electronics. 2 2 2 2 2 2 2 on off 8
Persistent Identifierhttp://hdl.handle.net/10722/298240
ISSN
2023 Impact Factor: 15.8
2023 SCImago Journal Rankings: 4.593
ISI Accession Number ID

 

DC FieldValueLanguage
dc.contributor.authorTang, Hao Ling-
dc.contributor.authorChiu, Ming Hui-
dc.contributor.authorTseng, Chien Chih-
dc.contributor.authorYang, Shih Hsien-
dc.contributor.authorHou, Kuan Jhih-
dc.contributor.authorWei, Sung Yen-
dc.contributor.authorHuang, Jing Kai-
dc.contributor.authorLin, Yen Fu-
dc.contributor.authorLien, Chen Hsin-
dc.contributor.authorLi, Lain Jong-
dc.date.accessioned2021-04-08T03:07:58Z-
dc.date.available2021-04-08T03:07:58Z-
dc.date.issued2017-
dc.identifier.citationACS Nano, 2017, v. 11, n. 12, p. 12817-12823-
dc.identifier.issn1936-0851-
dc.identifier.urihttp://hdl.handle.net/10722/298240-
dc.description.abstractTwo-dimensional (2D) materials are drawing growing attention for next-generation electronics and optoelectronics owing to its atomic thickness and unique physical properties. One of the challenges posed by 2D materials is the large source/drain (S/D) series resistance due to their thinness, which may be resolved by thickening the source and drain regions. Recently explored lateral graphene-MoS 1-3 and graphene-WS 1,4 heterostructures shed light on resolving the mentioned issues owing to their superior ohmic contact behaviors. However, recently reported field-effect transistors (FETs) based on graphene-TMD heterostructures have only shown n-type characteristics. The lack of p-type transistor limits their applications in complementary metal-oxide semiconductor electronics. In this work, we demonstrate p-type FETs based on graphene-WSe lateral heterojunctions grown with the scalable CVD technique. Few-layer WSe is overlapped with the multilayer graphene (MLG) at MLG-WSe junctions such that the contact resistance is reduced. Importantly, the few-layer WSe only forms at the junction region while the channel is still maintained as a WSe monolayer for transistor operation. Furthermore, by imposing doping to graphene S/D, 2 orders of magnitude enhancement in I /I ratio to ∼10 and the unipolar p-type characteristics are obtained regardless of the work function of the metal in ambient air condition. The MLG is proposed to serve as a 2D version of emerging raised source/drain approach in electronics. 2 2 2 2 2 2 2 on off 8-
dc.languageeng-
dc.relation.ispartofACS Nano-
dc.subjecttransistor-
dc.subjecttransition metal dichalcogenides-
dc.subjectheterostructure-
dc.subjectgraphene-
dc.subjectcontact-
dc.subjectWSe 2-
dc.titleMultilayer Graphene-WSe<inf>2</inf> Heterostructures for WSe<inf>2</inf> Transistors-
dc.typeArticle-
dc.description.naturelink_to_subscribed_fulltext-
dc.identifier.doi10.1021/acsnano.7b07755-
dc.identifier.pmid29182852-
dc.identifier.scopuseid_2-s2.0-85038809194-
dc.identifier.volume11-
dc.identifier.issue12-
dc.identifier.spage12817-
dc.identifier.epage12823-
dc.identifier.eissn1936-086X-
dc.identifier.isiWOS:000418990200112-
dc.identifier.issnl1936-0851-

Export via OAI-PMH Interface in XML Formats


OR


Export to Other Non-XML Formats