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- Publisher Website: 10.1049/PBCS029E_ch10
- Scopus: eid_2-s2.0-85014272246
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Book Chapter: Timing driven buffer insertion for carbon nanotube interconnects
Title | Timing driven buffer insertion for carbon nanotube interconnects |
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Authors | |
Keywords | Buffer circuits Carbon nanotubes Carbon nanotubes CNT Device performances High-speed high-performance interconnect Integrated circuit interconnections Integrated circuits Interconnect performances Technology scaling Timing driven buffer insertion |
Issue Date | 2016 |
Citation | Nano-CMOS and Post-CMOS Electronics: Devices and Modelling, 2016, p. 287-311 How to Cite? |
Abstract | In the nanoscale technology, both the device and interconnect performances affect the overall performance of the integrated circuits and systems in which they are used. So, it is quite natural to explore various solutions for devices as well as interconnects to mitigate the challenges of technology scaling and meet high-speed demand. This chapter discusses the use of carbon nanotubes (CNTs) as a potential high-speed high-performance interconnect as compared to the metal interconnects. |
Persistent Identifier | http://hdl.handle.net/10722/336173 |
DC Field | Value | Language |
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dc.contributor.author | Liu, Lin | - |
dc.contributor.author | Zhou, Yuchen | - |
dc.contributor.author | Hu, Shiyan | - |
dc.date.accessioned | 2024-01-15T08:24:10Z | - |
dc.date.available | 2024-01-15T08:24:10Z | - |
dc.date.issued | 2016 | - |
dc.identifier.citation | Nano-CMOS and Post-CMOS Electronics: Devices and Modelling, 2016, p. 287-311 | - |
dc.identifier.uri | http://hdl.handle.net/10722/336173 | - |
dc.description.abstract | In the nanoscale technology, both the device and interconnect performances affect the overall performance of the integrated circuits and systems in which they are used. So, it is quite natural to explore various solutions for devices as well as interconnects to mitigate the challenges of technology scaling and meet high-speed demand. This chapter discusses the use of carbon nanotubes (CNTs) as a potential high-speed high-performance interconnect as compared to the metal interconnects. | - |
dc.language | eng | - |
dc.relation.ispartof | Nano-CMOS and Post-CMOS Electronics: Devices and Modelling | - |
dc.subject | Buffer circuits | - |
dc.subject | Carbon nanotubes | - |
dc.subject | Carbon nanotubes | - |
dc.subject | CNT | - |
dc.subject | Device performances | - |
dc.subject | High-speed high-performance interconnect | - |
dc.subject | Integrated circuit interconnections | - |
dc.subject | Integrated circuits | - |
dc.subject | Interconnect performances | - |
dc.subject | Technology scaling | - |
dc.subject | Timing driven buffer insertion | - |
dc.title | Timing driven buffer insertion for carbon nanotube interconnects | - |
dc.type | Book_Chapter | - |
dc.description.nature | link_to_subscribed_fulltext | - |
dc.identifier.doi | 10.1049/PBCS029E_ch10 | - |
dc.identifier.scopus | eid_2-s2.0-85014272246 | - |
dc.identifier.spage | 287 | - |
dc.identifier.epage | 311 | - |