Minimization of the offset voltage in heterojunction dipolar transistors by using a thick spacer

Abstract

We have successfully fabricated and characterized two-dimensional electron gas emitter heterojunction bipolar transistors (2DEG emitter HBTs) of AlInAs/InGaAs and AlGaAs/GaAs compound materials. With a 50 nm thick undoped InGaAs spacer employed in the emitter junction, the offset voltage of the AlInAs/InGaAs HBT is reduced from 500 to 70 mV. Experimental data of the offset voltage obtained at different spacer thickness show that a spacer of 30 nm would be optimum for both AlGaAs/GaAs and AlInAs/InGaAs HBTs. This is basically in agreement with the numerical calculation of the electron sheet density of the 2DEG. The reduction of the offset voltage by using a 2DEG emitter is particularly important for the AlInGa/InGaAs or InP/InGaAs HBTs, since the breakdown voltage of these devices is usually low and the composition grading in the emitter is either very complicated or not applicable.