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Conference Paper: Reconfigurable acceleration of microphone array algorithms for speech enhancement

TitleReconfigurable acceleration of microphone array algorithms for speech enhancement
Authors
Yiu, KFCChun, HHGrbric, NLu, YShi, XLuk, W
Issue Date2008
Citation
Proceedings Of The International Conference On Application-Specific Systems, Architectures And Processors, 2008, p. 203-208 How to Cite?
DOI: http://dx.doi.org/10.1109/ASAP.2008.4580179
AbstractMicrophone arrays play an important role in noise reduction and speech enhancement. Their algorithms are based on beamforming, which reduces the level of localized and ambient noise signals while minimizing distortion to speech from the desired direction via spatial filtering. This paper describes a class of subband beamforming algorithms. The similarity between different algorithms is discussed. To enhance computational efficiency, the algorithms are implemented in frequency domain. A hardware architecture, with bitwidth optimization, is proposed to support the algorithms. An implementation with 7 instances on a Xilinx XC4VSX55 FPGA at 175MHz can run 41.7 times faster than the corresponding pure software implementation on a 3.2GHz Pentium 4 PC. ©2008 IEEE.
Persistent Identifierhttp://hdl.handle.net/10722/155909
ISSN
1063-6862
2020 SCImago Journal Rankings: 0.270
References
References in Scopus

 

DC FieldValueLanguage
dc.contributor.authorYiu, KFCen_US
dc.contributor.authorChun, HHen_US
dc.contributor.authorGrbric, Nen_US
dc.contributor.authorLu, Yen_US
dc.contributor.authorShi, Xen_US
dc.contributor.authorLuk, Wen_US
dc.date.accessioned2012-08-08T08:38:21Z-
dc.date.available2012-08-08T08:38:21Z-
dc.date.issued2008en_US
dc.identifier.citationProceedings Of The International Conference On Application-Specific Systems, Architectures And Processors, 2008, p. 203-208en_US
dc.identifier.issn1063-6862en_US
dc.identifier.urihttp://hdl.handle.net/10722/155909-
dc.description.abstractMicrophone arrays play an important role in noise reduction and speech enhancement. Their algorithms are based on beamforming, which reduces the level of localized and ambient noise signals while minimizing distortion to speech from the desired direction via spatial filtering. This paper describes a class of subband beamforming algorithms. The similarity between different algorithms is discussed. To enhance computational efficiency, the algorithms are implemented in frequency domain. A hardware architecture, with bitwidth optimization, is proposed to support the algorithms. An implementation with 7 instances on a Xilinx XC4VSX55 FPGA at 175MHz can run 41.7 times faster than the corresponding pure software implementation on a 3.2GHz Pentium 4 PC. ©2008 IEEE.en_US
dc.languageengen_US
dc.relation.ispartofProceedings of the International Conference on Application-Specific Systems, Architectures and Processorsen_US
dc.titleReconfigurable acceleration of microphone array algorithms for speech enhancementen_US
dc.typeConference_Paperen_US
dc.identifier.emailYiu, KFC:cedric@hkucc.hku.hken_US
dc.identifier.authorityYiu, KFC=rp00206en_US
dc.description.naturelink_to_subscribed_fulltexten_US
dc.identifier.doi10.1109/ASAP.2008.4580179en_US
dc.identifier.scopuseid_2-s2.0-51749092679en_US
dc.relation.referenceshttp://www.scopus.com/mlt/select.url?eid=2-s2.0-51749092679&selection=ref&src=s&origin=recordpageen_US
dc.identifier.spage203en_US
dc.identifier.epage208en_US
dc.identifier.scopusauthoridYiu, KFC=24802813000en_US
dc.identifier.scopusauthoridChun, HH=24801843200en_US
dc.identifier.scopusauthoridGrbric, N=24802029900en_US
dc.identifier.scopusauthoridLu, Y=7405481136en_US
dc.identifier.scopusauthoridShi, X=24802532400en_US
dc.identifier.scopusauthoridLuk, W=26029526200en_US
dc.identifier.issnl1063-6862-

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