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Conference Paper: Implementation of fast cosine transform on the Motorola DSP 96002 digital signal processor

TitleImplementation of fast cosine transform on the Motorola DSP 96002 digital signal processor
Authors
Tang, SKChan, SCHo, KLLam, FK
Issue Date1991
Citation
Proceedings - Ieee International Symposium On Circuits And Systems, 1991, v. 1, p. 73-76 How to Cite?
AbstractThe implementation of a fast cosine transform (FCT) algorithm on the Motorola DSP 96002 floating point digital signal processor is investigated. The algorithm adopted is one that was recently proposed by two of the authors (see S. C. Chan and K. L. Ho, 1990). Significant changes have been made to the basic algorithm to cope with the architectural features of the processor. Detailed timing results and limitations imposed by the processor are also presented.
Persistent Identifierhttp://hdl.handle.net/10722/158096
ISSN
0271-4310
2020 SCImago Journal Rankings: 0.229

 

DC FieldValueLanguage
dc.contributor.authorTang, SKen_US
dc.contributor.authorChan, SCen_US
dc.contributor.authorHo, KLen_US
dc.contributor.authorLam, FKen_US
dc.date.accessioned2012-08-08T08:58:04Z-
dc.date.available2012-08-08T08:58:04Z-
dc.date.issued1991en_US
dc.identifier.citationProceedings - Ieee International Symposium On Circuits And Systems, 1991, v. 1, p. 73-76en_US
dc.identifier.issn0271-4310en_US
dc.identifier.urihttp://hdl.handle.net/10722/158096-
dc.description.abstractThe implementation of a fast cosine transform (FCT) algorithm on the Motorola DSP 96002 floating point digital signal processor is investigated. The algorithm adopted is one that was recently proposed by two of the authors (see S. C. Chan and K. L. Ho, 1990). Significant changes have been made to the basic algorithm to cope with the architectural features of the processor. Detailed timing results and limitations imposed by the processor are also presented.en_US
dc.languageengen_US
dc.relation.ispartofProceedings - IEEE International Symposium on Circuits and Systemsen_US
dc.titleImplementation of fast cosine transform on the Motorola DSP 96002 digital signal processoren_US
dc.typeConference_Paperen_US
dc.identifier.emailChan, SC:scchan@eee.hku.hken_US
dc.identifier.emailHo, KL:klho@eee.hku.hken_US
dc.identifier.authorityChan, SC=rp00094en_US
dc.identifier.authorityHo, KL=rp00117en_US
dc.description.naturelink_to_subscribed_fulltexten_US
dc.identifier.scopuseid_2-s2.0-0026373536en_US
dc.identifier.volume1en_US
dc.identifier.spage73en_US
dc.identifier.epage76en_US
dc.identifier.scopusauthoridTang, SK=37043291000en_US
dc.identifier.scopusauthoridChan, SC=13310287100en_US
dc.identifier.scopusauthoridHo, KL=7403581592en_US
dc.identifier.scopusauthoridLam, FK=7102075939en_US
dc.identifier.issnl0271-4310-

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