File Download

There are no files associated with this item.

  Links for fulltext
     (May Require Subscription)
Supplementary

Conference Paper: An Efficient Two-level DC Operating Points Finder for Transistor Circuits

TitleAn Efficient Two-level DC Operating Points Finder for Transistor Circuits
Authors
KeywordsDC analysis
nonlinear equations
transistor circuits simulation
inclusion method
Issue Date2014
PublisherAssociation for Computing Machinery (ACM). The Journal's web site is located at https://dl.acm.org/conference/dac/proceedings
Citation
Proceedings of the 51st Annual Design Automation Conference (DAC14), San Francisco, USA, 2-5 June 2014, p. 1-6 How to Cite?
AbstractDC analysis, as a foundation for the simulation of many electronic circuits, is concerned with locating DC operating points. In this paper, a new and efficient algorithm to find all DC operating points is proposed for transistor circuits. The novelty of this DC operating points finder is its two-level simple implementation based on the affine arithmetic preconditioning and interval contraction method. Compared to traditional methods such as homotopy, this finder offers a dramatically faster way of computing all roots, without sacrificing any accuracy. Explicit numerical examples and comparative analysis are given to demonstrate the feasibility and accuracy of the proposed approach.
Persistent Identifierhttp://hdl.handle.net/10722/204079
ISBN
ISI Accession Number ID

 

DC FieldValueLanguage
dc.contributor.authorDeng, J-
dc.contributor.authorBatselier, K-
dc.contributor.authorZhang, Y-
dc.contributor.authorWong, N-
dc.date.accessioned2014-09-19T20:04:40Z-
dc.date.available2014-09-19T20:04:40Z-
dc.date.issued2014-
dc.identifier.citationProceedings of the 51st Annual Design Automation Conference (DAC14), San Francisco, USA, 2-5 June 2014, p. 1-6-
dc.identifier.isbn9781450327305-
dc.identifier.urihttp://hdl.handle.net/10722/204079-
dc.description.abstractDC analysis, as a foundation for the simulation of many electronic circuits, is concerned with locating DC operating points. In this paper, a new and efficient algorithm to find all DC operating points is proposed for transistor circuits. The novelty of this DC operating points finder is its two-level simple implementation based on the affine arithmetic preconditioning and interval contraction method. Compared to traditional methods such as homotopy, this finder offers a dramatically faster way of computing all roots, without sacrificing any accuracy. Explicit numerical examples and comparative analysis are given to demonstrate the feasibility and accuracy of the proposed approach.-
dc.languageeng-
dc.publisherAssociation for Computing Machinery (ACM). The Journal's web site is located at https://dl.acm.org/conference/dac/proceedings-
dc.relation.ispartofProceedings of the 51st Annual Design Automation Conference (DAC)-
dc.subjectDC analysis-
dc.subjectnonlinear equations-
dc.subjecttransistor circuits simulation-
dc.subjectinclusion method-
dc.titleAn Efficient Two-level DC Operating Points Finder for Transistor Circuits-
dc.typeConference_Paper-
dc.identifier.emailBatselier, K: kbatseli@hku.hk-
dc.identifier.emailZhang, Y: yangzh@hku.hk-
dc.identifier.emailWong, N: nwong@eee.hku.hk-
dc.identifier.authorityWong, N=rp00190-
dc.identifier.doi10.1145/2593069.2593087-
dc.identifier.scopuseid_2-s2.0-84903150190-
dc.identifier.hkuros238585-
dc.identifier.hkuros236712-
dc.identifier.spage1-
dc.identifier.epage6-
dc.identifier.isiWOS:000346506400115-
dc.publisher.placeUnited States-

Export via OAI-PMH Interface in XML Formats


OR


Export to Other Non-XML Formats