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Conference Paper: Sparse Tensor Network System Identification for Nonlinear Circuit Macromodeling

TitleSparse Tensor Network System Identification for Nonlinear Circuit Macromodeling
Authors
Issue Date2018
PublisherIEEE. The Journal's web site is located at http://ieeexplore.ieee.org/xpl/conhome.jsp?punumber=1000707
Citation
Proceedings of IEEE 14th International Conference on Solid-State and Integrated Circuit Technology (ICSICT) 2018, Qingdao, China, 31 October - 3 November 2018 How to Cite?
AbstractVolterra-series nonlinear system identification has recently been transformed into a tensor decomposition and opti-mization problem. Such tensor network reformulation with small tensor cores overcomes the curse of dimensionality in deploying high order Volterra kernels, and allows the fast simulation of arbitrarily nonlinear systems. This paper further advances the tensor core identification by adding sparsity: pruning unimportant weights and retraining the remaining weights, while retaining most accuracy. The resultant sparse macromodels are hardware friendly and can facilitate low power signal processing.
DescriptionInvited Talk
Persistent Identifierhttp://hdl.handle.net/10722/261962
ISBN

 

DC FieldValueLanguage
dc.contributor.authorZhang, Y-
dc.contributor.authorKo, CY-
dc.contributor.authorChen, C-
dc.contributor.authorBatselier, K-
dc.contributor.authorWong, N-
dc.date.accessioned2018-09-28T04:51:02Z-
dc.date.available2018-09-28T04:51:02Z-
dc.date.issued2018-
dc.identifier.citationProceedings of IEEE 14th International Conference on Solid-State and Integrated Circuit Technology (ICSICT) 2018, Qingdao, China, 31 October - 3 November 2018-
dc.identifier.isbn978-1-5386-4441-6-
dc.identifier.urihttp://hdl.handle.net/10722/261962-
dc.descriptionInvited Talk-
dc.description.abstractVolterra-series nonlinear system identification has recently been transformed into a tensor decomposition and opti-mization problem. Such tensor network reformulation with small tensor cores overcomes the curse of dimensionality in deploying high order Volterra kernels, and allows the fast simulation of arbitrarily nonlinear systems. This paper further advances the tensor core identification by adding sparsity: pruning unimportant weights and retraining the remaining weights, while retaining most accuracy. The resultant sparse macromodels are hardware friendly and can facilitate low power signal processing.-
dc.languageeng-
dc.publisherIEEE. The Journal's web site is located at http://ieeexplore.ieee.org/xpl/conhome.jsp?punumber=1000707-
dc.relation.ispartofInternational Conference on Solid-State and Integrated Circuit Technology Proceedings-
dc.rightsInternational Conference on Solid-State and Integrated Circuit Technology Proceedings. Copyright © IEEE.-
dc.rights©2018 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.-
dc.titleSparse Tensor Network System Identification for Nonlinear Circuit Macromodeling-
dc.typeConference_Paper-
dc.identifier.emailZhang, Y: yukeyuke@HKUCC-COM.hku.hk-
dc.identifier.emailBatselier, K: kbatseli@HKUCC-COM.hku.hk-
dc.identifier.emailWong, N: nwong@eee.hku.hk-
dc.identifier.authorityWong, N=rp00190-
dc.identifier.doi10.1109/ICSICT.2018.8565702-
dc.identifier.hkuros292480-
dc.publisher.placeUnited States-

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