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Article: Effects of trapped charges in gate dielectric and high- k encapsulation on performance of MoS2 transistor

TitleEffects of trapped charges in gate dielectric and high- k encapsulation on performance of MoS2 transistor
Authors
KeywordsDielectrics
Scattering
Logic gates
Molybdenum
Sulfur
Issue Date2019
PublisherIEEE. The Journal's web site is located at http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=16
Citation
IEEE Transactions on Electron Devices, 2019, v. 66 n. 2, p. 1107-1112 How to Cite?
AbstractThe effects of trapped charges in gate dielectric and high-k encapsulation layer on the performance of MoS 2 transistor are investigatedby using SiO 2 with different thicknesses as the gate dielectric and HfO 2 as the encapsulation layer of the MoS 2 surface. Results indicate that the positive trapped charges in SiO 2 can increase the electrons in MoS 2 for screening the scattering of charged impurity (CI) in SiO 2 and at the SiO 2 /MoS 2 interface to increase the carrier mobility. However, the CI scattering becomes stronger for thicker gate dielectric with more trapped charges and can dominate the electron screening effect to reduce the mobility. On the other hand, with the HfO 2 encapsulation, the OFF-currents of the devices greatly increase and their threshold voltages shift negatively due to more electrons induced by more positive charges trapped in HfO 2 . Moreover, the screening effect of these electrons on the CI scattering results in a mobility increase, which increases with the magnitude of the CI scattering. A 51% improvement in mobility is obtained for the sample suffering from the strongest CI scattering, fully demonstrating the effective screening role of high-k dielectric on the CI scattering.
Persistent Identifierhttp://hdl.handle.net/10722/278168
ISSN
2019 Impact Factor: 2.913
2015 SCImago Journal Rankings: 1.436
ISI Accession Number ID

 

DC FieldValueLanguage
dc.contributor.authorXU, JP-
dc.contributor.authorXIE, WX-
dc.contributor.authorLIU, L-
dc.contributor.authorZHAO, X-
dc.contributor.authorSONG, X-
dc.contributor.authorLai, PT-
dc.contributor.authorTANG, WM-
dc.date.accessioned2019-10-04T08:08:47Z-
dc.date.available2019-10-04T08:08:47Z-
dc.date.issued2019-
dc.identifier.citationIEEE Transactions on Electron Devices, 2019, v. 66 n. 2, p. 1107-1112-
dc.identifier.issn0018-9383-
dc.identifier.urihttp://hdl.handle.net/10722/278168-
dc.description.abstractThe effects of trapped charges in gate dielectric and high-k encapsulation layer on the performance of MoS 2 transistor are investigatedby using SiO 2 with different thicknesses as the gate dielectric and HfO 2 as the encapsulation layer of the MoS 2 surface. Results indicate that the positive trapped charges in SiO 2 can increase the electrons in MoS 2 for screening the scattering of charged impurity (CI) in SiO 2 and at the SiO 2 /MoS 2 interface to increase the carrier mobility. However, the CI scattering becomes stronger for thicker gate dielectric with more trapped charges and can dominate the electron screening effect to reduce the mobility. On the other hand, with the HfO 2 encapsulation, the OFF-currents of the devices greatly increase and their threshold voltages shift negatively due to more electrons induced by more positive charges trapped in HfO 2 . Moreover, the screening effect of these electrons on the CI scattering results in a mobility increase, which increases with the magnitude of the CI scattering. A 51% improvement in mobility is obtained for the sample suffering from the strongest CI scattering, fully demonstrating the effective screening role of high-k dielectric on the CI scattering.-
dc.languageeng-
dc.publisherIEEE. The Journal's web site is located at http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=16-
dc.relation.ispartofIEEE Transactions on Electron Devices-
dc.rightsIEEE Transactions on Electron Devices. Copyright © IEEE.-
dc.rights©20xx IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.-
dc.subjectDielectrics-
dc.subjectScattering-
dc.subjectLogic gates-
dc.subjectMolybdenum-
dc.subjectSulfur-
dc.titleEffects of trapped charges in gate dielectric and high- k encapsulation on performance of MoS2 transistor-
dc.typeArticle-
dc.identifier.emailLai, PT: laip@eee.hku.hk-
dc.identifier.authorityLai, PT=rp00130-
dc.description.naturelink_to_subscribed_fulltext-
dc.identifier.doi10.1109/TED.2018.2888598-
dc.identifier.scopuseid_2-s2.0-85060499005-
dc.identifier.hkuros306909-
dc.identifier.volume66-
dc.identifier.issue2-
dc.identifier.spage1107-
dc.identifier.epage1112-
dc.identifier.isiWOS:000457302100040-
dc.publisher.placeUnited States-
dc.identifier.issnl0018-9383-

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