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Collection's Items (Sorted by Submit Date in Descending order): 61 to 80 of 1559
| Title | Author(s) | Issue Date | Views | |
|---|---|---|---|---|
Power grid analysis with hierarchical support graphs Proceeding/Conference:IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD | 2011 | |||
A transceiver-aware routing framework for on-chip nanophotonic integration Proceeding/Conference:Proceedings of 2010 International Conference on Intelligent Control and Information Processing, ICICIP 2010 | 2010 | |||
The fast optimal voltage partitioning algorithm for peak power density minimization Proceeding/Conference:IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD | 2010 | |||
Energy efficient fault-tolerance task allocation scheme for real-time energy harvesting systems Proceeding/Conference:Proceedings of 2010 International Conference on Intelligent Control and Information Processing, ICICIP 2010 | 2010 | |||
Parallel hierarchical cross entropy optimization for on-chip decap budgeting Proceeding/Conference:Proceedings - Design Automation Conference | 2010 | |||
Adaptive task allocation for multiprocessor SoCs in real-time energy harvesting systems Proceeding/Conference:Proceedings of the 11th International Symposium on Quality Electronic Design, ISQED 2010 | 2010 | |||
Ultra-fast interconnect driven cell cloning for minimizing critical path delay Proceeding/Conference:Proceedings of the International Symposium on Physical Design | 2010 | |||
The epsilon-approximation to discrete VT assignment for leakage power minimization Proceeding/Conference:IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD | 2009 | |||
A fully polynomial time approximation scheme for timing driven minimum cost buffer insertion Proceeding/Conference:Proceedings - Design Automation Conference | 2009 | |||
Fast characterization of parameterized cell library Proceeding/Conference:Proceedings of the 10th International Symposium on Quality Electronic Design, ISQED 2009 | 2009 | |||
A polynomial time approximation scheme for timing constrained minimum cost layer assignment Proceeding/Conference:IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD | 2008 | |||
Unified adaptivity optimization of clock and logic signals Proceeding/Conference:IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD | 2007 | |||
A new fast slew buffering algorithm without input slew assumptions Proceeding/Conference:2007 IEEE Dallas/CAS Workshop on System-on-Chip (SoC): Design, Applications, Integration, and Software, DCAS-07 | 2007 | |||
A new RLC buffer insertion algorithm Proceeding/Conference:IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD | 2006 | |||
Fast interconnect synthesis with layer assignment Proceeding/Conference:Proceedings of the International Symposium on Physical Design | 2008 | |||
Hybrid trigonometric differential evolution for optimizing harmonic distribution Proceeding/Conference:Proceedings - IEEE International Symposium on Circuits and Systems | 2005 | |||
Pattern sensitive placement for manufacturability Proceeding/Conference:Proceedings of the International Symposium on Physical Design | 2007 | |||
Gate sizing for cell library-based designs Proceeding/Conference:Proceedings - Design Automation Conference | 2007 | |||
An efficient algorithm for RLC buffer insertion Proceeding/Conference:Proceedings - Eighth International Symposium on Quality Electronic Design, ISQED 2007 | 2007 | |||
A new twisted differential line structure in global bus design Proceeding/Conference:Proceedings - Design Automation Conference | 2007 |
Collection's Items (Sorted by Submit Date in Descending order): 61 to 80 of 1559