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Article: A practical regularization technique for modified nodal analysis in large-scale time-domain circuit simulation

TitleA practical regularization technique for modified nodal analysis in large-scale time-domain circuit simulation
Authors
KeywordsExplicit Method
Graph Theory
Index Reduction
Modified Nodal Analysis (MNA)
Singular Matrix
Issue Date2012
PublisherIEEE. The Journal's web site is located at http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=43
Citation
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2012, v. 31 n. 7, p. 1031-1040 How to Cite?
AbstractFast full-chip time-domain simulation calls for advanced numerical integration techniques with capability to handle the systems with (tens of) millions of variables resulting from the modified nodal analysis (MNA). General MNA formulation, however, leads to a differential algebraic equation (DAE) system with singular coefficient matrix, for which most of explicit methods, which usually offer better scalability than implicit methods, are not readily available. In this paper, we develop a practical two-stage strategy to remove the singularity in MNA equations of large-scale circuit networks. A topological index reduction is first applied to reduce the DAE index of the MNA equation to one. The index-1 system is then fed into a systematic process to eliminate excess variables in one run, which leads to a nonsingular system. The whole regularization process is devised with emphasis on exact equivalence, low complexity, and sparsity preservation, and is thus well suited to handle extremely large circuits. © 2012 IEEE.
Persistent Identifierhttp://hdl.handle.net/10722/174230
ISSN
2021 Impact Factor: 2.565
2020 SCImago Journal Rankings: 0.556
ISI Accession Number ID
References

 

DC FieldValueLanguage
dc.contributor.authorChen, Qen_US
dc.contributor.authorWeng, SHen_US
dc.contributor.authorCheng, CKen_US
dc.date.accessioned2012-11-22T02:00:04Z-
dc.date.available2012-11-22T02:00:04Z-
dc.date.issued2012en_US
dc.identifier.citationIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2012, v. 31 n. 7, p. 1031-1040en_US
dc.identifier.issn0278-0070en_US
dc.identifier.urihttp://hdl.handle.net/10722/174230-
dc.description.abstractFast full-chip time-domain simulation calls for advanced numerical integration techniques with capability to handle the systems with (tens of) millions of variables resulting from the modified nodal analysis (MNA). General MNA formulation, however, leads to a differential algebraic equation (DAE) system with singular coefficient matrix, for which most of explicit methods, which usually offer better scalability than implicit methods, are not readily available. In this paper, we develop a practical two-stage strategy to remove the singularity in MNA equations of large-scale circuit networks. A topological index reduction is first applied to reduce the DAE index of the MNA equation to one. The index-1 system is then fed into a systematic process to eliminate excess variables in one run, which leads to a nonsingular system. The whole regularization process is devised with emphasis on exact equivalence, low complexity, and sparsity preservation, and is thus well suited to handle extremely large circuits. © 2012 IEEE.en_US
dc.languageengen_US
dc.publisherIEEE. The Journal's web site is located at http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=43-
dc.relation.ispartofIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systemsen_US
dc.subjectExplicit Methoden_US
dc.subjectGraph Theoryen_US
dc.subjectIndex Reductionen_US
dc.subjectModified Nodal Analysis (MNA)en_US
dc.subjectSingular Matrixen_US
dc.titleA practical regularization technique for modified nodal analysis in large-scale time-domain circuit simulationen_US
dc.typeArticleen_US
dc.identifier.emailChen, Q: q1chen@hku.hken_US
dc.identifier.authorityChen, Q=rp01688en_US
dc.description.naturelink_to_subscribed_fulltexten_US
dc.identifier.doi10.1109/TCAD.2012.2184761en_US
dc.identifier.scopuseid_2-s2.0-84862642884en_US
dc.identifier.hkuros222536-
dc.relation.referenceshttp://www.scopus.com/mlt/select.url?eid=2-s2.0-84862642884&selection=ref&src=s&origin=recordpageen_US
dc.identifier.volume31en_US
dc.identifier.issue7en_US
dc.identifier.spage1031en_US
dc.identifier.epage1040en_US
dc.identifier.isiWOS:000305625700005-
dc.publisher.placeUnited Statesen_US
dc.identifier.scopusauthoridChen, Q=18133382800en_US
dc.identifier.scopusauthoridWeng, SH=36104767300en_US
dc.identifier.scopusauthoridCheng, CK=7404797875en_US
dc.identifier.issnl0278-0070-

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