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Conference Paper: Extending BORPH for shared memory reconfigurable computers

TitleExtending BORPH for shared memory reconfigurable computers
Authors
Xun, CWen, MWu, NZhang, CSo, HKH
KeywordsEmbedded processors
Hardware design
Reconfigurable computer
Shared memories
Software process
Software program
Virtual memory
Issue Date2012
PublisherIEEE Computer Society. The Journal's web site is located at http://ieeexplore.ieee.org/xpl/conhome.jsp?punumber=1001053
Citation
The 22nd International Conference on Field Programmable Logic and Applications (FPL 2012), Oslo, Norway, 29-31 August 2012. In Conference Proceedings, 2012, p. 563-566 How to Cite?
DOI: http://dx.doi.org/10.1109/FPL.2012.6339371
AbstractWe extend BORPH for shared memory reconfigurable computers in this paper. BORPH is an operating system designed for FPGA based reconfigurable computers. BORPH introduced the concept of hardware process in contrast to software process. With our extension, hardware processes are supported to communicate with other processes based on shared memory. In our system, the program of hardware process is not just hardware design, but the software program running on embedded processor in FPGA. Our experiment shows the overhead of shared memory segments management is acceptable. And with independent virtual memory access, bandwidth of repeated shared memory access is high.
Persistent Identifierhttp://hdl.handle.net/10722/202291
ISBN
978-1-4673-2256-0

 

DC FieldValueLanguage
dc.contributor.authorXun, C-
dc.contributor.authorWen, M-
dc.contributor.authorWu, N-
dc.contributor.authorZhang, C-
dc.contributor.authorSo, HKH-
dc.date.accessioned2014-09-03T06:28:02Z-
dc.date.available2014-09-03T06:28:02Z-
dc.date.issued2012-
dc.identifier.citationThe 22nd International Conference on Field Programmable Logic and Applications (FPL 2012), Oslo, Norway, 29-31 August 2012. In Conference Proceedings, 2012, p. 563-566-
dc.identifier.isbn978-1-4673-2256-0-
dc.identifier.urihttp://hdl.handle.net/10722/202291-
dc.description.abstractWe extend BORPH for shared memory reconfigurable computers in this paper. BORPH is an operating system designed for FPGA based reconfigurable computers. BORPH introduced the concept of hardware process in contrast to software process. With our extension, hardware processes are supported to communicate with other processes based on shared memory. In our system, the program of hardware process is not just hardware design, but the software program running on embedded processor in FPGA. Our experiment shows the overhead of shared memory segments management is acceptable. And with independent virtual memory access, bandwidth of repeated shared memory access is high.-
dc.languageeng-
dc.publisherIEEE Computer Society. The Journal's web site is located at http://ieeexplore.ieee.org/xpl/conhome.jsp?punumber=1001053-
dc.relation.ispartofInternational Conference on Field Programmable Logic and Applications Proceedings-
dc.subjectEmbedded processors-
dc.subjectHardware design-
dc.subjectReconfigurable computer-
dc.subjectShared memories-
dc.subjectSoftware process-
dc.subjectSoftware program-
dc.subjectVirtual memory-
dc.titleExtending BORPH for shared memory reconfigurable computersen_US
dc.typeConference_Paperen_US
dc.identifier.emailSo, HKH: hso@eee.hku.hk-
dc.description.naturelink_to_subscribed_fulltext-
dc.identifier.doi10.1109/FPL.2012.6339371-
dc.identifier.scopuseid_2-s2.0-84870717398-
dc.identifier.hkuros236899-
dc.identifier.spage563-
dc.identifier.epage566-
dc.publisher.placeUnited states-
dc.customcontrol.immutablesml 140903-

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