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Conference Paper: Latch-up characteristics of a trench-gate conductivity modulated power transistor
Title | Latch-up characteristics of a trench-gate conductivity modulated power transistor |
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Authors | |
Issue Date | 1995 |
Publisher | I E E E. The Journal's web site is located at http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=3573 |
Citation | IEEE Region 10th International Conference on Microelectronics and VLSI (TENCON '95), Hong Kong, China, 6-10 November 1995. In IEEE Region International Conference on Microelectronics and VLSI Proceedings, 1995, p. 424-427 How to Cite? |
Abstract | In this paper, a new conductivity modulated power transistor, called the Lateral Trench-Gate Bipolar Transistor (LTGBT), is presented. The current at which the latch-up occurs in the structure is estimated in comparison with that of the LIGBT. The latch-up current density for the LTGBT exhibits more than 7.7 times improvement over the LIGBT. The dependence of the latch-up current density on the design of the n+ and p+ cathode regions of the structure is also examined. The maximum controllable latch-up current density is found to increase with decreasing the space between the trench gate and the p+ cathode. |
Description | Conference Theme: Asia-Pacific Microelectronics 2000 |
Persistent Identifier | http://hdl.handle.net/10722/204149 |
ISBN | |
ISSN |
DC Field | Value | Language |
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dc.contributor.author | Jun, C | en_US |
dc.contributor.author | Sin, JKO | en_US |
dc.contributor.author | Ng, WT | en_US |
dc.contributor.author | Lai, PT | en_US |
dc.date.accessioned | 2014-09-19T20:06:51Z | - |
dc.date.available | 2014-09-19T20:06:51Z | - |
dc.date.issued | 1995 | en_US |
dc.identifier.citation | IEEE Region 10th International Conference on Microelectronics and VLSI (TENCON '95), Hong Kong, China, 6-10 November 1995. In IEEE Region International Conference on Microelectronics and VLSI Proceedings, 1995, p. 424-427 | en_US |
dc.identifier.isbn | 9780780326248 | - |
dc.identifier.issn | 0886-1420 | - |
dc.identifier.uri | http://hdl.handle.net/10722/204149 | - |
dc.description | Conference Theme: Asia-Pacific Microelectronics 2000 | - |
dc.description.abstract | In this paper, a new conductivity modulated power transistor, called the Lateral Trench-Gate Bipolar Transistor (LTGBT), is presented. The current at which the latch-up occurs in the structure is estimated in comparison with that of the LIGBT. The latch-up current density for the LTGBT exhibits more than 7.7 times improvement over the LIGBT. The dependence of the latch-up current density on the design of the n+ and p+ cathode regions of the structure is also examined. The maximum controllable latch-up current density is found to increase with decreasing the space between the trench gate and the p+ cathode. | - |
dc.language | eng | en_US |
dc.publisher | I E E E. The Journal's web site is located at http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=3573 | - |
dc.relation.ispartof | IEEE Region International Conference on Microelectronics and VLSI Proceedings | en_US |
dc.rights | ©1995 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. | - |
dc.title | Latch-up characteristics of a trench-gate conductivity modulated power transistor | en_US |
dc.type | Conference_Paper | en_US |
dc.identifier.email | Lai, PT: laip@eee.hku.hk | en_US |
dc.identifier.authority | Lai, PT=rp00130 | en_US |
dc.description.nature | published_or_final_version | - |
dc.identifier.doi | 10.1109/TENCON.1995.496430 | - |
dc.identifier.scopus | eid_2-s2.0-0029534371 | - |
dc.identifier.hkuros | 240620 | en_US |
dc.identifier.hkuros | 12535 | - |
dc.identifier.spage | 424 | en_US |
dc.identifier.epage | 427 | en_US |
dc.publisher.place | United States | - |
dc.identifier.issnl | 0886-1420 | - |