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  Patent History
  • Application
    CN 1998120500 1998-10-28
  • Publication
    CN 1219040 1999-06-09
  Patent Family

Patent: Qiepu clock restoring device for quick correcting error

TitleQiepu clock restoring device for quick correcting error
Priority Date1998-10-28 CN1998120500
Inventors
Issue Date1999
Citation
China Published Patent Application CN 1219040. Beijing, PRC: State Intellectual Property Office (SIPO) of the P.R.C., 1999 How to Cite?
AbstractThe chirp clock restoring device for directly sequential frequency expansion BPSK/QPSK communication receiver includes fixed correlator, shift correlator, VCO control loop, gate circuit, data feedback branch, L counter and other parts. In the chirp clock restoring part, there are additional shift correlator, feedback branch and gate circuit except the fixed correlator. The VCO producing chirp clock is controlled simultaneously by the fixed correlator and the shift correlator to reduce bit error rate. The present invention can raise chirp clock restoring track speed and quality, and it may be used widely in communication receivers and is suitable for spot-to-spot frequency expansion communication,spot-to-spots frequency expansion communication and CDMA mobile communication.
Persistent Identifierhttp://hdl.handle.net/10722/206714

 

DC FieldValueLanguage
dc.date.accessioned2014-11-25T04:19:21Z-
dc.date.available2014-11-25T04:19:21Z-
dc.date.issued1999en_US
dc.identifier.citationChina Published Patent Application CN 1219040. Beijing, PRC: State Intellectual Property Office (SIPO) of the P.R.C., 1999en_US
dc.identifier.urihttp://hdl.handle.net/10722/206714-
dc.description.abstractThe chirp clock restoring device for directly sequential frequency expansion BPSK/QPSK communication receiver includes fixed correlator, shift correlator, VCO control loop, gate circuit, data feedback branch, L counter and other parts. In the chirp clock restoring part, there are additional shift correlator, feedback branch and gate circuit except the fixed correlator. The VCO producing chirp clock is controlled simultaneously by the fixed correlator and the shift correlator to reduce bit error rate. The present invention can raise chirp clock restoring track speed and quality, and it may be used widely in communication receivers and is suitable for spot-to-spot frequency expansion communication,spot-to-spots frequency expansion communication and CDMA mobile communication.en_US
dc.relation.isreferencedbyCN 102023299 (A) 2011-04-20en_US
dc.relation.isreferencedbyC N102023299 (B) 2012-11-28en_US
dc.titleQiepu clock restoring device for quick correcting erroren_US
dc.typePatenten_US
dc.identifier.authorityWU, DONGSHENG=rp00159en_US
dc.description.naturepublished_or_final_versionen_US
dc.identifier.hkuros81745en_US
dc.contributor.inventorHU, AIQUNen_US
dc.contributor.inventorWU, DONGSHENGen_US
patents.identifier.applicationCN 1998120500en_US
patents.description.assigneeHONGKONG UNIV [HK]en_US
patents.description.countryChina, PRCen_US
patents.date.publication1999-06-09en_US
patents.date.application1998-10-28en_US
patents.date.priority1998-10-28 CN1998120500en_US
patents.description.cccnen_US
patents.identifier.publicationCN 1219040en_US
patents.relation.familyC N1089204 (C) 2002-08-14en_US
patents.description.kindAen_US

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