UE-TCAM: an ultra efficient SRAM-based TCAM

Abstract

Ternary content-addressable memories (TCAMs) are high speed memories; however, compared to static random- access memories (SRAMs), TCAMs suffer from low storage density, relatively slow access time, poor scalability, complexity in circuitry, and higher cost. To access the benefits of SRAM, several SRAM-based TCAMs, specifically on field-programmable gate array (FPGA) platforms, were proposed. To further improve the performance of SRAM-based TCAMs, this paper presents UE-TCAM, which reduces memory requirement, latency, power consumption, and improves speed. An example design of 512 × 36 of UE-TCAM has been implemented on Xilinx Virtex-6 FPGA. Performance evaluation confirms a significant improvement in the proposed UE-TCAM, which achieves 100% reduction in 18K B-RAMs, 74.67% reduction in SRs, 70.28% reduction in LUTs, 75.76% reduction in energy-delay product, and 60% reduction in latency and improves speed by 70.85%, compared with the available SRAM-based TCAM.