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Article: Negative gate-bias instability of ZnO thin-film transistors studied by current–voltage and capacitance–voltage analyses

TitleNegative gate-bias instability of ZnO thin-film transistors studied by current–voltage and capacitance–voltage analyses
Authors
Issue Date2014
PublisherAmerican Vacuum Society. The Journal's web site is located at http://avspublications.org/jvstb/
Citation
Journal of Vacuum Science and Technology: Part B Nanotechnology & Microelectronics, 2014, v. 32 n. 6, article no. 061208 How to Cite?
AbstractEffects of negative gate-bias stress on the electrical properties of ZnO thin-film transistors (TFTs) are investigated. Under negative gate-bias stress, the ZnO TFTs exhibit higher carrier mobility, larger OFF-state current, and a negative shift in threshold voltage with no significant change in subthreshold slope. The time dependence of threshold-voltage shift on various bias stress conditions can be described by a logarithmic equation. Based on the analysis of hysteresis behaviors in current–voltage and capacitance–voltage characteristics before and after the negative gate-bias stress, it can be clarified that the threshold-voltage shift is predominantly attributed to the trapping of positive charge carriers in the defect states at the gate-dielectric/channel interface or in the dielectric during the negative gate-bias stress.
Persistent Identifierhttp://hdl.handle.net/10722/217032
ISSN
2023 Impact Factor: 1.5
2023 SCImago Journal Rankings: 0.328
ISI Accession Number ID

 

DC FieldValueLanguage
dc.contributor.authorLiu, Y-
dc.contributor.authorMo, S-
dc.contributor.authorYao, R-
dc.contributor.authorLai, PT-
dc.date.accessioned2015-09-18T05:46:35Z-
dc.date.available2015-09-18T05:46:35Z-
dc.date.issued2014-
dc.identifier.citationJournal of Vacuum Science and Technology: Part B Nanotechnology & Microelectronics, 2014, v. 32 n. 6, article no. 061208-
dc.identifier.issn2166-2746-
dc.identifier.urihttp://hdl.handle.net/10722/217032-
dc.description.abstractEffects of negative gate-bias stress on the electrical properties of ZnO thin-film transistors (TFTs) are investigated. Under negative gate-bias stress, the ZnO TFTs exhibit higher carrier mobility, larger OFF-state current, and a negative shift in threshold voltage with no significant change in subthreshold slope. The time dependence of threshold-voltage shift on various bias stress conditions can be described by a logarithmic equation. Based on the analysis of hysteresis behaviors in current–voltage and capacitance–voltage characteristics before and after the negative gate-bias stress, it can be clarified that the threshold-voltage shift is predominantly attributed to the trapping of positive charge carriers in the defect states at the gate-dielectric/channel interface or in the dielectric during the negative gate-bias stress.-
dc.languageeng-
dc.publisherAmerican Vacuum Society. The Journal's web site is located at http://avspublications.org/jvstb/-
dc.relation.ispartofJournal of Vacuum Science and Technology: Part B Nanotechnology & Microelectronics-
dc.rightsCopyright 2014 American Vacuum Society. This article may be downloaded for personal use only. Any other use requires prior permission of the author and the American Vacuum Society. The following article appeared in Journal of Vacuum Science and Technology B, 2014, v. 32 n. 6, article no. 061208 and may be found at https://doi.org/10.1116/1.4901505.-
dc.titleNegative gate-bias instability of ZnO thin-film transistors studied by current–voltage and capacitance–voltage analyses-
dc.typeArticle-
dc.identifier.emailLai, PT: laip@eee.hku.hk-
dc.identifier.authorityLai, PT=rp00130-
dc.description.naturepublished_or_final_version-
dc.identifier.doi10.1116/1.4901505-
dc.identifier.scopuseid_2-s2.0-84929484788-
dc.identifier.hkuros254209-
dc.identifier.volume32-
dc.identifier.issue6-
dc.identifier.spagearticle no. 061208-
dc.identifier.epagearticle no. 061208-
dc.identifier.isiWOS:000345512800067-
dc.publisher.placeUnited States-
dc.identifier.issnl2166-2746-

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