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Article: Positive Gate Bias and Temperature-Induced Instability of α -InGaZnO Thin-Film Transistor With ZrLaO Gate Dielectric

TitlePositive Gate Bias and Temperature-Induced Instability of α -InGaZnO Thin-Film Transistor With ZrLaO Gate Dielectric
Authors
KeywordsAmorphous indium-gallium-zinc oxide (α-IGZO)
electrical instability
high-k gate dielectric
thin-film transistor (TFT).
Issue Date2016
PublisherIEEE. The Journal's web site is located at http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=16
Citation
IEEE Transactions on Electron Devices, 2016, v. 63 n. 5, p. 1899-1903 How to Cite?
Persistent Identifierhttp://hdl.handle.net/10722/234056
ISSN
2021 Impact Factor: 3.221
2020 SCImago Journal Rankings: 0.828
ISI Accession Number ID

 

DC FieldValueLanguage
dc.contributor.authorHUANG, X-
dc.contributor.authorSONG, J-
dc.contributor.authorLai, PT-
dc.date.accessioned2016-10-14T06:58:46Z-
dc.date.available2016-10-14T06:58:46Z-
dc.date.issued2016-
dc.identifier.citationIEEE Transactions on Electron Devices, 2016, v. 63 n. 5, p. 1899-1903-
dc.identifier.issn0018-9383-
dc.identifier.urihttp://hdl.handle.net/10722/234056-
dc.languageeng-
dc.publisherIEEE. The Journal's web site is located at http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=16-
dc.relation.ispartofIEEE Transactions on Electron Devices-
dc.rightsIEEE Transactions on Electron Devices. Copyright © IEEE.-
dc.rights©20xx IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. -
dc.subjectAmorphous indium-gallium-zinc oxide (α-IGZO)-
dc.subjectelectrical instability-
dc.subjecthigh-k gate dielectric-
dc.subjectthin-film transistor (TFT).-
dc.titlePositive Gate Bias and Temperature-Induced Instability of α -InGaZnO Thin-Film Transistor With ZrLaO Gate Dielectric-
dc.typeArticle-
dc.identifier.emailLai, PT: laip@eee.hku.hk-
dc.identifier.authorityLai, PT=rp00130-
dc.identifier.doi10.1109/TED.2016.2541319-
dc.identifier.scopuseid_2-s2.0-84979469556-
dc.identifier.hkuros267833-
dc.identifier.volume63-
dc.identifier.issue5-
dc.identifier.spage1899-
dc.identifier.epage1903-
dc.identifier.isiWOS:000375004500015-
dc.publisher.placeUnited States-
dc.identifier.issnl0018-9383-

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