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Article: Effects of trapped charges in gate dielectric and high- k encapsulation on performance of MoS2 transistor
Title | Effects of trapped charges in gate dielectric and high- k encapsulation on performance of MoS2 transistor |
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Authors | |
Keywords | Dielectrics Scattering Logic gates Molybdenum Sulfur |
Issue Date | 2019 |
Publisher | IEEE. The Journal's web site is located at http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=16 |
Citation | IEEE Transactions on Electron Devices, 2019, v. 66 n. 2, p. 1107-1112 How to Cite? |
Abstract | The effects of trapped charges in gate dielectric and high-k encapsulation layer on the performance of MoS 2 transistor are investigatedby using SiO 2 with different thicknesses as the gate dielectric and HfO 2 as the encapsulation layer of the MoS 2 surface. Results indicate that the positive trapped charges in SiO 2 can increase the electrons in MoS 2 for screening the scattering of charged impurity (CI) in SiO 2 and at the SiO 2 /MoS 2 interface to increase the carrier mobility. However, the CI scattering becomes stronger for thicker gate dielectric with more trapped charges and can dominate the electron screening effect to reduce the mobility. On the other hand, with the HfO 2 encapsulation, the OFF-currents of the devices greatly increase and their threshold voltages shift negatively due to more electrons induced by more positive charges trapped in HfO 2 . Moreover, the screening effect of these electrons on the CI scattering results in a mobility increase, which increases with the magnitude of the CI scattering. A 51% improvement in mobility is obtained for the sample suffering from the strongest CI scattering, fully demonstrating the effective screening role of high-k dielectric on the CI scattering. |
Persistent Identifier | http://hdl.handle.net/10722/278168 |
ISSN | 2023 Impact Factor: 2.9 2023 SCImago Journal Rankings: 0.785 |
ISI Accession Number ID |
DC Field | Value | Language |
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dc.contributor.author | XU, JP | - |
dc.contributor.author | XIE, WX | - |
dc.contributor.author | LIU, L | - |
dc.contributor.author | ZHAO, X | - |
dc.contributor.author | SONG, X | - |
dc.contributor.author | Lai, PT | - |
dc.contributor.author | TANG, WM | - |
dc.date.accessioned | 2019-10-04T08:08:47Z | - |
dc.date.available | 2019-10-04T08:08:47Z | - |
dc.date.issued | 2019 | - |
dc.identifier.citation | IEEE Transactions on Electron Devices, 2019, v. 66 n. 2, p. 1107-1112 | - |
dc.identifier.issn | 0018-9383 | - |
dc.identifier.uri | http://hdl.handle.net/10722/278168 | - |
dc.description.abstract | The effects of trapped charges in gate dielectric and high-k encapsulation layer on the performance of MoS 2 transistor are investigatedby using SiO 2 with different thicknesses as the gate dielectric and HfO 2 as the encapsulation layer of the MoS 2 surface. Results indicate that the positive trapped charges in SiO 2 can increase the electrons in MoS 2 for screening the scattering of charged impurity (CI) in SiO 2 and at the SiO 2 /MoS 2 interface to increase the carrier mobility. However, the CI scattering becomes stronger for thicker gate dielectric with more trapped charges and can dominate the electron screening effect to reduce the mobility. On the other hand, with the HfO 2 encapsulation, the OFF-currents of the devices greatly increase and their threshold voltages shift negatively due to more electrons induced by more positive charges trapped in HfO 2 . Moreover, the screening effect of these electrons on the CI scattering results in a mobility increase, which increases with the magnitude of the CI scattering. A 51% improvement in mobility is obtained for the sample suffering from the strongest CI scattering, fully demonstrating the effective screening role of high-k dielectric on the CI scattering. | - |
dc.language | eng | - |
dc.publisher | IEEE. The Journal's web site is located at http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=16 | - |
dc.relation.ispartof | IEEE Transactions on Electron Devices | - |
dc.rights | IEEE Transactions on Electron Devices. Copyright © IEEE. | - |
dc.rights | ©20xx IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. | - |
dc.subject | Dielectrics | - |
dc.subject | Scattering | - |
dc.subject | Logic gates | - |
dc.subject | Molybdenum | - |
dc.subject | Sulfur | - |
dc.title | Effects of trapped charges in gate dielectric and high- k encapsulation on performance of MoS2 transistor | - |
dc.type | Article | - |
dc.identifier.email | Lai, PT: laip@eee.hku.hk | - |
dc.identifier.authority | Lai, PT=rp00130 | - |
dc.description.nature | link_to_subscribed_fulltext | - |
dc.identifier.doi | 10.1109/TED.2018.2888598 | - |
dc.identifier.scopus | eid_2-s2.0-85060499005 | - |
dc.identifier.hkuros | 306909 | - |
dc.identifier.volume | 66 | - |
dc.identifier.issue | 2 | - |
dc.identifier.spage | 1107 | - |
dc.identifier.epage | 1112 | - |
dc.identifier.isi | WOS:000457302100040 | - |
dc.publisher.place | United States | - |
dc.identifier.issnl | 0018-9383 | - |