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- Publisher Website: 10.1109/LED.2020.2967422
- Scopus: eid_2-s2.0-85080955541
- WOS: WOS:000519704300019
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Article: Improved Interfacial and Electrical Properties of MoS2 Transistor With High/Low-Temperature Grown Hf0.5Al0.5O as Top-Gate Dielectric
Title | Improved Interfacial and Electrical Properties of MoS2 Transistor With High/Low-Temperature Grown Hf0.5Al0.5O as Top-Gate Dielectric |
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Authors | |
Keywords | Dielectrics Dielectrics Transistors Logic gates Hafnium oxide |
Issue Date | 2020 |
Publisher | IEEE. The Journal's web site is located at http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=55 |
Citation | IEEE Electron Device Letters, 2020, v. 41 n. 3, p. 385-388 How to Cite? |
Abstract | Uniform Hf 0.5 Al 0.5 O top-gate (TG) dielectric can be grown directly on the MoS 2 surface using a high/low-temperature deposition method, and excellent performances for few-layer (FL) MoS 2 transistors with Hf 0.5 Al 0.5 O as TG dielectric can be achieved: high mobility of 90 cm 2 /Vs, small sub-threshold swing of 77 mV/dec and low interface-state density of 1.08 × 10 12 eV -1 cm -2 . The involved mechanisms lie in the facts that (1) the TG dielectric can prevent the MoS 2 surface from absorbing the oxygen and moisture in the air; (2) growing the Hf 0.5 Al 0.5 O dielectric at low temperature can well provide nucleation sites for its subsequent high-temperature growth; and (3) doping Al into HfO 2 can reduce the trap charges in the resulting HfAlO dielectric to weaken the Coulomb scattering and also produce densified and uniform dielectric film. Therefore, the Hf 0.5 Al 0.5 O TG-dielectric structure and its growth method described in this work have a high potential to fabricate high-performance FL MoS 2 field-effect transistors for practical electron device applications. |
Persistent Identifier | http://hdl.handle.net/10722/287938 |
ISSN | 2023 Impact Factor: 4.1 2023 SCImago Journal Rankings: 1.250 |
ISI Accession Number ID |
DC Field | Value | Language |
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dc.contributor.author | Zhao, XY | - |
dc.contributor.author | Xu, JP | - |
dc.contributor.author | Liu, L | - |
dc.contributor.author | Lai, PT | - |
dc.contributor.author | Tang, WM | - |
dc.date.accessioned | 2020-10-05T12:05:27Z | - |
dc.date.available | 2020-10-05T12:05:27Z | - |
dc.date.issued | 2020 | - |
dc.identifier.citation | IEEE Electron Device Letters, 2020, v. 41 n. 3, p. 385-388 | - |
dc.identifier.issn | 0741-3106 | - |
dc.identifier.uri | http://hdl.handle.net/10722/287938 | - |
dc.description.abstract | Uniform Hf 0.5 Al 0.5 O top-gate (TG) dielectric can be grown directly on the MoS 2 surface using a high/low-temperature deposition method, and excellent performances for few-layer (FL) MoS 2 transistors with Hf 0.5 Al 0.5 O as TG dielectric can be achieved: high mobility of 90 cm 2 /Vs, small sub-threshold swing of 77 mV/dec and low interface-state density of 1.08 × 10 12 eV -1 cm -2 . The involved mechanisms lie in the facts that (1) the TG dielectric can prevent the MoS 2 surface from absorbing the oxygen and moisture in the air; (2) growing the Hf 0.5 Al 0.5 O dielectric at low temperature can well provide nucleation sites for its subsequent high-temperature growth; and (3) doping Al into HfO 2 can reduce the trap charges in the resulting HfAlO dielectric to weaken the Coulomb scattering and also produce densified and uniform dielectric film. Therefore, the Hf 0.5 Al 0.5 O TG-dielectric structure and its growth method described in this work have a high potential to fabricate high-performance FL MoS 2 field-effect transistors for practical electron device applications. | - |
dc.language | eng | - |
dc.publisher | IEEE. The Journal's web site is located at http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=55 | - |
dc.relation.ispartof | IEEE Electron Device Letters | - |
dc.rights | IEEE Electron Device Letters. Copyright © IEEE. | - |
dc.rights | ©20xx IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. | - |
dc.subject | Dielectrics | - |
dc.subject | Dielectrics | - |
dc.subject | Transistors | - |
dc.subject | Logic gates | - |
dc.subject | Hafnium oxide | - |
dc.title | Improved Interfacial and Electrical Properties of MoS2 Transistor With High/Low-Temperature Grown Hf0.5Al0.5O as Top-Gate Dielectric | - |
dc.type | Article | - |
dc.identifier.email | Lai, PT: laip@eee.hku.hk | - |
dc.identifier.authority | Lai, PT=rp00130 | - |
dc.description.nature | link_to_subscribed_fulltext | - |
dc.identifier.doi | 10.1109/LED.2020.2967422 | - |
dc.identifier.scopus | eid_2-s2.0-85080955541 | - |
dc.identifier.hkuros | 315183 | - |
dc.identifier.volume | 41 | - |
dc.identifier.issue | 3 | - |
dc.identifier.spage | 385 | - |
dc.identifier.epage | 388 | - |
dc.identifier.isi | WOS:000519704300019 | - |
dc.publisher.place | United States | - |
dc.identifier.issnl | 0741-3106 | - |