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Article: Redundancy and Analog Slicing for Precise In-Memory Machine Learning—Part I: Programming Techniques

TitleRedundancy and Analog Slicing for Precise In-Memory Machine Learning—Part I: Programming Techniques
Authors
KeywordsArtificial intelligence (AI)
in-memory computing (IMC)
memory reliability
memristor
neural network
Issue Date2021
PublisherInstitute of Electrical and Electronics Engineers. The Journal's web site is located at http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=16
Citation
IEEE Transactions on Electron Devices, 2021, v. 68 n. 9, p. 4373-4378 How to Cite?
AbstractIn-memory computing (IMC) is receiving considerable interest for accelerating artificial intelligence (AI) tasks, such as neural network training and inference. However, IMC can also accelerate other machine learning (ML) and scientific computing problems, such as recommendation systems, regression, and PageRank, which are ubiquitous in datacenters. These applications typically have higher precision requirements than neural networks, which can challenge analog-based IMC and sacrifice some of the expected energy efficiency benefits. In this article, we address these challenges experimentally, presenting new techniques improving the accuracy of the solution of linear algebra problems, such as eigenvector extraction for PageRank, in a fully integrated circuit (IC) with analog resistive random access memory (RRAM) devices. Our custom redundancy algorithm can improve the programming accuracy by using multiple memory devices for representing a single matrix entry. Accuracy is further improved by error compensation with analog slicing, which allows an ever more precise value representation.
Persistent Identifierhttp://hdl.handle.net/10722/305792
ISSN
2022 Impact Factor: 3.1
2020 SCImago Journal Rankings: 0.828
ISI Accession Number ID

 

DC FieldValueLanguage
dc.contributor.authorPedretti, P-
dc.contributor.authorMannocci, M-
dc.contributor.authorLi, C-
dc.contributor.authorSun, Z-
dc.contributor.authorStrachan, JP-
dc.contributor.authorIelmini, D-
dc.date.accessioned2021-10-20T10:14:23Z-
dc.date.available2021-10-20T10:14:23Z-
dc.date.issued2021-
dc.identifier.citationIEEE Transactions on Electron Devices, 2021, v. 68 n. 9, p. 4373-4378-
dc.identifier.issn0018-9383-
dc.identifier.urihttp://hdl.handle.net/10722/305792-
dc.description.abstractIn-memory computing (IMC) is receiving considerable interest for accelerating artificial intelligence (AI) tasks, such as neural network training and inference. However, IMC can also accelerate other machine learning (ML) and scientific computing problems, such as recommendation systems, regression, and PageRank, which are ubiquitous in datacenters. These applications typically have higher precision requirements than neural networks, which can challenge analog-based IMC and sacrifice some of the expected energy efficiency benefits. In this article, we address these challenges experimentally, presenting new techniques improving the accuracy of the solution of linear algebra problems, such as eigenvector extraction for PageRank, in a fully integrated circuit (IC) with analog resistive random access memory (RRAM) devices. Our custom redundancy algorithm can improve the programming accuracy by using multiple memory devices for representing a single matrix entry. Accuracy is further improved by error compensation with analog slicing, which allows an ever more precise value representation.-
dc.languageeng-
dc.publisherInstitute of Electrical and Electronics Engineers. The Journal's web site is located at http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=16-
dc.relation.ispartofIEEE Transactions on Electron Devices-
dc.rightsIEEE Transactions on Electron Devices. Copyright © Institute of Electrical and Electronics Engineers.-
dc.rights©20xx IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.-
dc.subjectArtificial intelligence (AI)-
dc.subjectin-memory computing (IMC)-
dc.subjectmemory reliability-
dc.subjectmemristor-
dc.subjectneural network-
dc.titleRedundancy and Analog Slicing for Precise In-Memory Machine Learning—Part I: Programming Techniques-
dc.typeArticle-
dc.identifier.emailLi, C: canl@hku.hk-
dc.identifier.authorityLi, C=rp02706-
dc.description.naturelink_to_subscribed_fulltext-
dc.identifier.doi10.1109/TED.2021.3095433-
dc.identifier.scopuseid_2-s2.0-85112630176-
dc.identifier.hkuros327479-
dc.identifier.volume68-
dc.identifier.issue9-
dc.identifier.spage4373-
dc.identifier.epage4378-
dc.identifier.isiWOS:000686761500034-
dc.publisher.placeUnited States-

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