All Hardware-Based Two-Layer Perceptron Implemented in Memristor Crossbar Arrays

Abstract

Implementing synaptic weights using tunable conductance of memristors offers significant power and computing throughput improvements through in-memory analog computing. Hardware-based perceptron implementation with memristor crossbar arrays has attracted increased interest in recent years. However, all the previous memristor-based perceptron demonstrations perform some critical operations such as the activation functions using software, leading to substantial back-and-forth communication between the perceptron and a computer. In this work, we show that by implementing the activation functions between different layers of a perceptron all on hardware, using only analog components, we can avoid those unnecessary communication and improve power efficiency and throughput. We have designed a compact multi-channel rectified linear unit activation function and developed a two-layer perceptron using two individual memristor crossbar arrays. We have achieved a 93.63% recognition accuracy in classifying the Modified National Institute of Standards and Technology dataset using the analog neurons, comparable with that for a partially software counterpart, and a much improved power efficiency.