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- Publisher Website: 10.1109/ISCAS.2009.5118434
- Scopus: eid_2-s2.0-70350148752
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Conference Paper: Variational analog integrated circuit design via symbolic sensitivity analysis
Title | Variational analog integrated circuit design via symbolic sensitivity analysis |
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Authors | |
Keywords | Analog circuit design Binary decision diagram Design optimization Graph reduction Symbolic AC sensitivity |
Issue Date | 2009 |
Citation | Proceedings - IEEE International Symposium on Circuits and Systems, 2009, p. 3002-3005 How to Cite? |
Abstract | This paper presents a symbolic AC sensitivity analysis technique using a graph-reduction based symbolic simulator GRASS. Symbolic sum-of-products are derived from a graph reduction process and represented by a binary decision diagram. The GRASS simulator maintains a one-to-one correspondence between the circuit parameters and the simulator symbols, with which differentiating the frequency response with respect to any circuit parameter becomes straightforward. The implementation details of symbolic AC sensitivity are presented and the potential applications are demonstrated. ©2009 IEEE. |
Persistent Identifier | http://hdl.handle.net/10722/315219 |
ISSN | 2023 SCImago Journal Rankings: 0.307 |
DC Field | Value | Language |
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dc.contributor.author | Shi, Guoyong | - |
dc.contributor.author | Meng, Xiaoxuan | - |
dc.date.accessioned | 2022-08-05T10:18:06Z | - |
dc.date.available | 2022-08-05T10:18:06Z | - |
dc.date.issued | 2009 | - |
dc.identifier.citation | Proceedings - IEEE International Symposium on Circuits and Systems, 2009, p. 3002-3005 | - |
dc.identifier.issn | 0271-4310 | - |
dc.identifier.uri | http://hdl.handle.net/10722/315219 | - |
dc.description.abstract | This paper presents a symbolic AC sensitivity analysis technique using a graph-reduction based symbolic simulator GRASS. Symbolic sum-of-products are derived from a graph reduction process and represented by a binary decision diagram. The GRASS simulator maintains a one-to-one correspondence between the circuit parameters and the simulator symbols, with which differentiating the frequency response with respect to any circuit parameter becomes straightforward. The implementation details of symbolic AC sensitivity are presented and the potential applications are demonstrated. ©2009 IEEE. | - |
dc.language | eng | - |
dc.relation.ispartof | Proceedings - IEEE International Symposium on Circuits and Systems | - |
dc.subject | Analog circuit design | - |
dc.subject | Binary decision diagram | - |
dc.subject | Design optimization | - |
dc.subject | Graph reduction | - |
dc.subject | Symbolic AC sensitivity | - |
dc.title | Variational analog integrated circuit design via symbolic sensitivity analysis | - |
dc.type | Conference_Paper | - |
dc.description.nature | link_to_subscribed_fulltext | - |
dc.identifier.doi | 10.1109/ISCAS.2009.5118434 | - |
dc.identifier.scopus | eid_2-s2.0-70350148752 | - |
dc.identifier.spage | 3002 | - |
dc.identifier.epage | 3005 | - |