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- Publisher Website: 10.1049/iet-pel.2015.0296
- Scopus: eid_2-s2.0-84987678296
- WOS: WOS:000384010400006
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Article: Modelling and control of a novel zero-current-switching inverter with sinusoidal current output
Title | Modelling and control of a novel zero-current-switching inverter with sinusoidal current output |
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Authors | |
Issue Date | 2016 |
Citation | IET Power Electronics, 2016, v. 9, n. 11, p. 2205-2215 How to Cite? |
Abstract | This study presents a novel topology of charge-transferring zero-current-switching (CT-ZCS) inverter to improve the efficiency. Its operating principle, optimal zero-current-switching (ZCS) frequency and design guidelines are elucidated in detail. A reduced-order modelling method of time-charge discretisation, which treats a set of two separate ZCS as one combined switch cell, is put forward and the topology can be simplified to dual-buck half-bridge inverter (DBHBI) topology. Since the DBHBI-derived CT-ZCS inverter permits higher comparison frequency of hysteresis control than traditional hard-switching inverters, the three-level relay control with high-frequency pulse modulation is recommended. Compared with two-level and three-level hysteresis control, the proposed control can achieve effective output harmonic reduction, decreasing from 2.335 to 1.66%, and minimise the size of inverter under the same output condition. In addition, a current controller is designed to optimise the system and enhance its anti-disturbance performance. Finally, the experiment on a 35-V 2-A prototype verifies the validity of the proposed method. |
Persistent Identifier | http://hdl.handle.net/10722/318633 |
ISSN | 2023 Impact Factor: 1.7 2023 SCImago Journal Rankings: 0.736 |
ISI Accession Number ID |
DC Field | Value | Language |
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dc.contributor.author | Liu, Wei | - |
dc.contributor.author | Zhang, Jiasheng | - |
dc.contributor.author | Chen, Rong | - |
dc.date.accessioned | 2022-10-11T12:24:12Z | - |
dc.date.available | 2022-10-11T12:24:12Z | - |
dc.date.issued | 2016 | - |
dc.identifier.citation | IET Power Electronics, 2016, v. 9, n. 11, p. 2205-2215 | - |
dc.identifier.issn | 1755-4535 | - |
dc.identifier.uri | http://hdl.handle.net/10722/318633 | - |
dc.description.abstract | This study presents a novel topology of charge-transferring zero-current-switching (CT-ZCS) inverter to improve the efficiency. Its operating principle, optimal zero-current-switching (ZCS) frequency and design guidelines are elucidated in detail. A reduced-order modelling method of time-charge discretisation, which treats a set of two separate ZCS as one combined switch cell, is put forward and the topology can be simplified to dual-buck half-bridge inverter (DBHBI) topology. Since the DBHBI-derived CT-ZCS inverter permits higher comparison frequency of hysteresis control than traditional hard-switching inverters, the three-level relay control with high-frequency pulse modulation is recommended. Compared with two-level and three-level hysteresis control, the proposed control can achieve effective output harmonic reduction, decreasing from 2.335 to 1.66%, and minimise the size of inverter under the same output condition. In addition, a current controller is designed to optimise the system and enhance its anti-disturbance performance. Finally, the experiment on a 35-V 2-A prototype verifies the validity of the proposed method. | - |
dc.language | eng | - |
dc.relation.ispartof | IET Power Electronics | - |
dc.title | Modelling and control of a novel zero-current-switching inverter with sinusoidal current output | - |
dc.type | Article | - |
dc.description.nature | link_to_subscribed_fulltext | - |
dc.identifier.doi | 10.1049/iet-pel.2015.0296 | - |
dc.identifier.scopus | eid_2-s2.0-84987678296 | - |
dc.identifier.volume | 9 | - |
dc.identifier.issue | 11 | - |
dc.identifier.spage | 2205 | - |
dc.identifier.epage | 2215 | - |
dc.identifier.eissn | 1755-4543 | - |
dc.identifier.isi | WOS:000384010400006 | - |