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Conference Paper: Multi-Scale Thermal Modeling of RRAM-based 3D Monolithic-Integrated Computing-in-Memory Chips

TitleMulti-Scale Thermal Modeling of RRAM-based 3D Monolithic-Integrated Computing-in-Memory Chips
Authors
Issue Date2022
Citation
Technical Digest - International Electron Devices Meeting, IEDM, 2022, v. 2022-December, p. 1551-1554 How to Cite?
AbstractCalculation of chip-scale temperature distribution with considering the device behaviors and integration structure is a challenging modeling task. In this paper, we demonstrated the first multi-scale thermal simulation for RRAM-based computing-in-memory chips. To achieve this, we developed a thermal modeling framework, from RRAM device to two level of circuits, 3D integration architecture, and chip package. We assess the temperature distributions under different technology nodes, different cooling methods, and different operation conditions. Furthermore, with the embedded compact model of RRAM, the thermal effects on the computing accuracy of deep neural network computing is evaluated. Some useful design guidelines are provided based on the simulation results.
Persistent Identifierhttp://hdl.handle.net/10722/334896
ISSN
2023 SCImago Journal Rankings: 1.047
ISI Accession Number ID

 

DC FieldValueLanguage
dc.contributor.authorMa, Awang-
dc.contributor.authorGao, Bin-
dc.contributor.authorLiu, Yuyi-
dc.contributor.authorYao, Peng-
dc.contributor.authorLiu, Zhengwu-
dc.contributor.authorDu, Yiwei-
dc.contributor.authorLi, Xinyi-
dc.contributor.authorXu, Feng-
dc.contributor.authorHao, Zhenqi-
dc.contributor.authorTang, Jianshi-
dc.contributor.authorQian, He-
dc.contributor.authorWu, Huaqiang-
dc.date.accessioned2023-10-20T06:51:34Z-
dc.date.available2023-10-20T06:51:34Z-
dc.date.issued2022-
dc.identifier.citationTechnical Digest - International Electron Devices Meeting, IEDM, 2022, v. 2022-December, p. 1551-1554-
dc.identifier.issn0163-1918-
dc.identifier.urihttp://hdl.handle.net/10722/334896-
dc.description.abstractCalculation of chip-scale temperature distribution with considering the device behaviors and integration structure is a challenging modeling task. In this paper, we demonstrated the first multi-scale thermal simulation for RRAM-based computing-in-memory chips. To achieve this, we developed a thermal modeling framework, from RRAM device to two level of circuits, 3D integration architecture, and chip package. We assess the temperature distributions under different technology nodes, different cooling methods, and different operation conditions. Furthermore, with the embedded compact model of RRAM, the thermal effects on the computing accuracy of deep neural network computing is evaluated. Some useful design guidelines are provided based on the simulation results.-
dc.languageeng-
dc.relation.ispartofTechnical Digest - International Electron Devices Meeting, IEDM-
dc.titleMulti-Scale Thermal Modeling of RRAM-based 3D Monolithic-Integrated Computing-in-Memory Chips-
dc.typeConference_Paper-
dc.description.naturelink_to_subscribed_fulltext-
dc.identifier.doi10.1109/IEDM45625.2022.10019354-
dc.identifier.scopuseid_2-s2.0-85147519953-
dc.identifier.volume2022-December-
dc.identifier.spage1551-
dc.identifier.epage1554-
dc.identifier.isiWOS:000968800700014-

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