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Conference Paper: Perspective on Low-dimensional Channel Materials for Extremely Scaled CMOS

TitlePerspective on Low-dimensional Channel Materials for Extremely Scaled CMOS
Authors
Issue Date2022
Citation
Digest of Technical Papers - Symposium on VLSI Technology, 2022, v. 2022-June, p. 403-404 How to Cite?
AbstractLow-dimensional materials (LDMs) such as two-dimensional transition metal dichalcogenides (2D TMDs) and carbon nanotubes (CNTs) have the potential to be the channel material in extremely scaled CMOS transistors. Based on current hardware data, the design space for contacted-gate pitch (CGP) scaled transistors is explored for these materials. The ON current, sources of leakage which limit OFF current, and CGP scaling potential are analyzed by separately considering effects from shrinking the gate length, contact length, and extension length. Doping of LDM is the main challenge to reduce contact and extension resistance for scaled transistors. Experimental control of p-type doping of 2D is reported as an example of doping impact.
Persistent Identifierhttp://hdl.handle.net/10722/335402
ISSN
2023 SCImago Journal Rankings: 0.911

 

DC FieldValueLanguage
dc.contributor.authorSu, Sheng Kai-
dc.contributor.authorChen, Edward-
dc.contributor.authorHung, Terry Y.T.-
dc.contributor.authorLi, Meng Zhan-
dc.contributor.authorPitner, Gregory-
dc.contributor.authorCheng, Chao Ching-
dc.contributor.authorWang, Han-
dc.contributor.authorCai, Jin-
dc.contributor.authorWong, H. S.Philip-
dc.contributor.authorRadu, Iuliana P.-
dc.date.accessioned2023-11-17T08:25:36Z-
dc.date.available2023-11-17T08:25:36Z-
dc.date.issued2022-
dc.identifier.citationDigest of Technical Papers - Symposium on VLSI Technology, 2022, v. 2022-June, p. 403-404-
dc.identifier.issn0743-1562-
dc.identifier.urihttp://hdl.handle.net/10722/335402-
dc.description.abstractLow-dimensional materials (LDMs) such as two-dimensional transition metal dichalcogenides (2D TMDs) and carbon nanotubes (CNTs) have the potential to be the channel material in extremely scaled CMOS transistors. Based on current hardware data, the design space for contacted-gate pitch (CGP) scaled transistors is explored for these materials. The ON current, sources of leakage which limit OFF current, and CGP scaling potential are analyzed by separately considering effects from shrinking the gate length, contact length, and extension length. Doping of LDM is the main challenge to reduce contact and extension resistance for scaled transistors. Experimental control of p-type doping of 2D is reported as an example of doping impact.-
dc.languageeng-
dc.relation.ispartofDigest of Technical Papers - Symposium on VLSI Technology-
dc.titlePerspective on Low-dimensional Channel Materials for Extremely Scaled CMOS-
dc.typeConference_Paper-
dc.description.naturelink_to_subscribed_fulltext-
dc.identifier.doi10.1109/VLSITechnologyandCir46769.2022.9830447-
dc.identifier.scopuseid_2-s2.0-85135213854-
dc.identifier.volume2022-June-
dc.identifier.spage403-
dc.identifier.epage404-

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