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- Publisher Website: 10.1109/IEDM45625.2022.10019491
- Scopus: eid_2-s2.0-85147522497
- WOS: WOS:000968800700147
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Conference Paper: High-Performance Monolayer WSe2 p/n FETs via Antimony-Platinum Modulated Contact Technology towards 2D CMOS Electronics
Title | High-Performance Monolayer WSe2 p/n FETs via Antimony-Platinum Modulated Contact Technology towards 2D CMOS Electronics |
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Authors | |
Issue Date | 2022 |
Citation | Technical Digest - International Electron Devices Meeting, IEDM, 2022, v. 2022-December, p. 721-724 How to Cite? |
Abstract | Low resistance contact technology for 2D semiconductors is a key bottleneck for the practical application of 2D channel materials at advanced logic nodes. This work presents a novel Sb-Pt modulated contact technology which can alleviate the Fermi-level pinning effect and mediate the band alignment at the metal-2D semiconductor interface, leading to exceptional ohmic contacts for both p-type and n-type WSe2 FETs (p/n FET). WSe2 FETs with different Sb/Pt contact compositions, in combination with new oxide-based encapsulation/doping technologies, exhibits record low pFET contact resistance of 0.75 mathrm{k} Omega bullet mu mathrm{m} among all reported monolayer (1L) 2D pFETs. The nFET contact resistance of 1.8 mathrm{k} Omega bullet mu mathrm{m} is also the lowest among 1L WSe2 nFETs. Both 1L WSe2 pFET and nFET demonstrated remarkable on-state p/n current sim 150 mu mathrm{A}/ mu mathrm{m} at vert mathrm{V}-{D} vert =1 mathrm{V}, indicating the potential of WSe2 for CMOS applications. A new version of the semi-automated dry transfer process for chemical vapor deposition (CVD) WSe2 was also developed utilizing a novel Bi/PMMA/TRT support stack, offering low defect wrinkle-free WSe2 transfer at wafer-scale. |
Persistent Identifier | http://hdl.handle.net/10722/335436 |
ISSN | 2023 SCImago Journal Rankings: 1.047 |
ISI Accession Number ID |
DC Field | Value | Language |
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dc.contributor.author | Chou, Ang Sheng | - |
dc.contributor.author | Lin, Yu Tung | - |
dc.contributor.author | Lin, Yuxuan Cosmi | - |
dc.contributor.author | Hsu, Ching Hao | - |
dc.contributor.author | Li, Ming Yang | - |
dc.contributor.author | Liew, San Lin | - |
dc.contributor.author | Chou, Sui An | - |
dc.contributor.author | Chen, Hung Yu | - |
dc.contributor.author | Chiu, Hsin Yuan | - |
dc.contributor.author | Ho, Po Hsun | - |
dc.contributor.author | Hsu, Ming Chun | - |
dc.contributor.author | Hsu, Yu Wei | - |
dc.contributor.author | Yang, Ning | - |
dc.contributor.author | Woon, Wei Yen | - |
dc.contributor.author | Liao, Szuya | - |
dc.contributor.author | Hou, Duen Huei | - |
dc.contributor.author | Chien, Chao Hsin | - |
dc.contributor.author | Chang, Wen Hao | - |
dc.contributor.author | Radu, Iuliana | - |
dc.contributor.author | Wu, Chih I. | - |
dc.contributor.author | Philip Wong, H. S. | - |
dc.contributor.author | Wang, Han | - |
dc.date.accessioned | 2023-11-17T08:25:53Z | - |
dc.date.available | 2023-11-17T08:25:53Z | - |
dc.date.issued | 2022 | - |
dc.identifier.citation | Technical Digest - International Electron Devices Meeting, IEDM, 2022, v. 2022-December, p. 721-724 | - |
dc.identifier.issn | 0163-1918 | - |
dc.identifier.uri | http://hdl.handle.net/10722/335436 | - |
dc.description.abstract | Low resistance contact technology for 2D semiconductors is a key bottleneck for the practical application of 2D channel materials at advanced logic nodes. This work presents a novel Sb-Pt modulated contact technology which can alleviate the Fermi-level pinning effect and mediate the band alignment at the metal-2D semiconductor interface, leading to exceptional ohmic contacts for both p-type and n-type WSe2 FETs (p/n FET). WSe2 FETs with different Sb/Pt contact compositions, in combination with new oxide-based encapsulation/doping technologies, exhibits record low pFET contact resistance of 0.75 mathrm{k} Omega bullet mu mathrm{m} among all reported monolayer (1L) 2D pFETs. The nFET contact resistance of 1.8 mathrm{k} Omega bullet mu mathrm{m} is also the lowest among 1L WSe2 nFETs. Both 1L WSe2 pFET and nFET demonstrated remarkable on-state p/n current sim 150 mu mathrm{A}/ mu mathrm{m} at vert mathrm{V}-{D} vert =1 mathrm{V}, indicating the potential of WSe2 for CMOS applications. A new version of the semi-automated dry transfer process for chemical vapor deposition (CVD) WSe2 was also developed utilizing a novel Bi/PMMA/TRT support stack, offering low defect wrinkle-free WSe2 transfer at wafer-scale. | - |
dc.language | eng | - |
dc.relation.ispartof | Technical Digest - International Electron Devices Meeting, IEDM | - |
dc.title | High-Performance Monolayer WSe2 p/n FETs via Antimony-Platinum Modulated Contact Technology towards 2D CMOS Electronics | - |
dc.type | Conference_Paper | - |
dc.description.nature | link_to_subscribed_fulltext | - |
dc.identifier.doi | 10.1109/IEDM45625.2022.10019491 | - |
dc.identifier.scopus | eid_2-s2.0-85147522497 | - |
dc.identifier.volume | 2022-December | - |
dc.identifier.spage | 721 | - |
dc.identifier.epage | 724 | - |
dc.identifier.isi | WOS:000968800700147 | - |