CMOS backend-of-line compatible memory array and logic circuitries enabled by high performance atomic layer deposited ZnO thin-film transistor

Abstract

<p>The development of high-performance oxide-based transistors is critical to enable very large-scale integration (VLSI) of monolithic 3-D integrated circuit (IC) in complementary metal oxide semiconductor (CMOS) backend-of-line (BEOL). Atomic layer deposition (ALD) deposited ZnO is an attractive candidate due to its excellent electrical properties, low processing temperature below copper interconnect thermal budget, and conformal sidewall deposition for novel 3D architecture. An optimized ALD deposited ZnO thin-film transistor achieving a record field-effect and intrinsic mobility (mu FE /mu o) of 85/140 cm2/V center dot s is presented here. The ZnO TFT was integrated with HfO2 RRAM in a 1 kbit (32 x 32) 1T1R array, demonstrating functionalities in RRAM switching. In order to co-design for future technology requiring high performance BEOL circuitries implementation, a spice-compatible model of the ZnO TFTs was developed. We then present designs of various ZnO TFT-based inverters, and 5-stage ring oscillators through simulations and experiments with working frequency exceeding 10's of MHz.</p><p>The progress of high-performance oxide-based transistors is essential for seamlessly integrating monolithic 3-D circuits into the CMOS backend. The authors propose using atomic layer deposition for ZnO due to its compatibility with low-temperature backend integration. They also successfully integrated ZnO TFTs with HfO2 RRAM in a 1 kbit 1T1R array, showcasing RRAM switching capabilities.</p>