Low Thermal Resistance (0.5 K/W) GaO Schottky Rectifiers with Double-Side Packaging

Abstract

The low thermal conductivity of Ga2O3 has arguably been the most serious concern for Ga2O3 power and RF devices. Despite many simulation studies, there is no experimental report on the thermal resistance of a large-area, packaged Ga2O3 device. This work fills this gap by demonstrating a 15-A double-side packaged Ga2O3 Schottky barrier diode (SBD) and measuring its junction-to-case thermal resistance ( {R} {\theta {\mathrm {JC}}} ) in the bottom-side- and junction-side-cooling configurations. The {R} {\theta \mathrm{JC}} characterization is based on the transient dual interface method, i.e., JEDEC 51-14 standard. The {R} {\theta \mathrm{JC}} of the junction- and bottom-cooled Ga2O3 SBD was measured to be 0.5 K/W and 1.43 K/W, respectively, with the former {R} {\theta \mathrm{JC}} lower than that of similarly-rated commercial SiC SBDs. This low {R} {\theta \mathrm{JC}} is attributable to the heat extraction directly from the Schottky junction instead of through the Ga2O3 chip. The {R} {\theta \mathrm{JC}} lower than that of commercial SiC devices proves the viability of Ga2O3 devices for high-power applications and manifest the significance of proper packaging for their thermal management.