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- Publisher Website: 10.1002/pssr.202400046
- Scopus: eid_2-s2.0-85192500619
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Article: 4 inch Gallium Oxide Field-Effect Transistors Array with High-k Ta2O5 as Gate Dielectric by Physical Vapor Deposition
| Title | 4 inch Gallium Oxide Field-Effect Transistors Array with High-k Ta2O5 as Gate Dielectric by Physical Vapor Deposition |
|---|---|
| Authors | |
| Keywords | 4-inch wafer scale e-mode Sn-doped Ga2O3 FETs high-k gate dielectric high-voltage nanodevices RT-physical vapor deposition |
| Issue Date | 10-May-2024 |
| Publisher | Wiley |
| Citation | physica status solidi - Rapid Research Letters, 2024, v. 18, n. 8 How to Cite? |
| Abstract | Field-effect transistors (FETs) with ultra-wide bandgap semiconductor Ga2O3 have been fabricated by physical vapor deposition with advantages of low cost, wafer scale, and rapid production. The insulator-like pristine Ga2O3 is converted to semiconductor by co-sputtering Sn with post-annealing, which demonstrates a 5.6 × 107 times higher on-state current. Importantly, this Sn-doped Ga2O3 sample shows a high breakdown voltage near 500 V. Furthermore, a 4 inch array of Sn-doped Ga2O3 FETs with high-k Ta2O5 gate dielectric has been fabricated on a silicon substrate, successfully showing a large on-current density of 1.3 mA mm−1, a high ION/IOFF of 2.5 × 106, and a low threshold voltage of 3.9 V, which are extracted from the average 350 devices. This work paves a promising way for Ga2O3-based nanoelectronics to serve medium-high voltage with low cost, rapid, and wafer-scale production. |
| Persistent Identifier | http://hdl.handle.net/10722/366956 |
| ISSN | 2023 Impact Factor: 2.5 2023 SCImago Journal Rankings: 0.655 |
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Liu, Zi Chun | - |
| dc.contributor.author | Li, Jia Cheng | - |
| dc.contributor.author | Yang, Hui Xia | - |
| dc.contributor.author | Yang, Han | - |
| dc.contributor.author | Huang, An | - |
| dc.contributor.author | Dai, De | - |
| dc.contributor.author | Huang, Yuan | - |
| dc.contributor.author | Zhang, Yi Yun | - |
| dc.contributor.author | Lai, Pui To | - |
| dc.contributor.author | Ma, Yuan Xiao | - |
| dc.contributor.author | Wang, Ye Liang | - |
| dc.date.accessioned | 2025-11-28T00:35:46Z | - |
| dc.date.available | 2025-11-28T00:35:46Z | - |
| dc.date.issued | 2024-05-10 | - |
| dc.identifier.citation | physica status solidi - Rapid Research Letters, 2024, v. 18, n. 8 | - |
| dc.identifier.issn | 1862-6254 | - |
| dc.identifier.uri | http://hdl.handle.net/10722/366956 | - |
| dc.description.abstract | Field-effect transistors (FETs) with ultra-wide bandgap semiconductor Ga2O3 have been fabricated by physical vapor deposition with advantages of low cost, wafer scale, and rapid production. The insulator-like pristine Ga2O3 is converted to semiconductor by co-sputtering Sn with post-annealing, which demonstrates a 5.6 × 10<sup>7</sup> times higher on-state current. Importantly, this Sn-doped Ga2O3 sample shows a high breakdown voltage near 500 V. Furthermore, a 4 inch array of Sn-doped Ga2O3 FETs with high-k Ta2O5 gate dielectric has been fabricated on a silicon substrate, successfully showing a large on-current density of 1.3 mA mm<sup>−1</sup>, a high ION/IOFF of 2.5 × 10<sup>6</sup>, and a low threshold voltage of 3.9 V, which are extracted from the average 350 devices. This work paves a promising way for Ga2O3-based nanoelectronics to serve medium-high voltage with low cost, rapid, and wafer-scale production. | - |
| dc.language | eng | - |
| dc.publisher | Wiley | - |
| dc.relation.ispartof | physica status solidi - Rapid Research Letters | - |
| dc.rights | This work is licensed under a Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License. | - |
| dc.subject | 4-inch wafer scale | - |
| dc.subject | e-mode Sn-doped Ga2O3 FETs | - |
| dc.subject | high-k gate dielectric | - |
| dc.subject | high-voltage nanodevices | - |
| dc.subject | RT-physical vapor deposition | - |
| dc.title | 4 inch Gallium Oxide Field-Effect Transistors Array with High-k Ta2O5 as Gate Dielectric by Physical Vapor Deposition | - |
| dc.type | Article | - |
| dc.identifier.doi | 10.1002/pssr.202400046 | - |
| dc.identifier.scopus | eid_2-s2.0-85192500619 | - |
| dc.identifier.volume | 18 | - |
| dc.identifier.issue | 8 | - |
| dc.identifier.eissn | 1862-6270 | - |
| dc.identifier.issnl | 1862-6254 | - |
