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Article: Improved interfacial properties of Ge MOS capacitor with high-k dielectric by using TaON/GeON dual interlayer

TitleImproved interfacial properties of Ge MOS capacitor with high-k dielectric by using TaON/GeON dual interlayer
Authors
KeywordsGe Mos
High K
Taon/Geon
Terms-Dual Interlayer
Issue Date2011
PublisherI E E E. The Journal's web site is located at http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=55
Citation
Ieee Electron Device Letters, 2011, v. 32 n. 2, p. 122-124 How to Cite?
AbstractGe MOS capacitors with tri-layer gate dielectric are proposed by using GeON interlayer, TaON sandwich layer, and HfTiON high-k dielectric. Very small capacitance equivalent thickness (0.79 ∼ 0.91 nm) is achieved. Experimental results show that the NO pretreated sample exhibits the best electrical properties, such as low interface-state density (5.4 × 10 11 cm -2eV.1), low gate leakage current density (∼3.16 × 10 -4 Acm -2 at Vg . Vfb = 1 V) and high device reliability. All of these should be attributed to the facts that the NO nitridation could form a GeON interlayer with suitable N content and thus provide an excellent GeON/Ge interface with strong Ge-N bonds, while the TaON sandwich layer could separate Hf and Ge, thus effectively preventing the reaction between them and improving the interface quality and electrical properties of the devices. © 2010 IEEE.
Persistent Identifierhttp://hdl.handle.net/10722/155601
ISSN
2021 Impact Factor: 4.816
2020 SCImago Journal Rankings: 1.337
ISI Accession Number ID
Funding AgencyGrant Number
National Natural Science Foundation of China60776016
Postdoctoral Foundation of China20100470056
RGC of HKSAR, ChinaHKU 713308E
University of Hong Kong200707176147
Nanotechnology Research Institute of the University of Hong00600009
Funding Information:

This work was supported by the National Natural Science Foundation of China under Grant 60776016, the Postdoctoral Foundation of China under Grant 20100470056, the RGC of HKSAR, China (Project no. HKU 713308E), the Small Project Funding of the University of Hong Kong (Project 200707176147), and the University Development Fund (Nanotechnology Research Institute, 00600009) of the University of Hong Kong. The review of this letter was arranged by Editor M. Passlack.

References
Grants

 

DC FieldValueLanguage
dc.contributor.authorJi, Fen_US
dc.contributor.authorXu, JPen_US
dc.contributor.authorLai, PTen_US
dc.contributor.authorLi, CXen_US
dc.contributor.authorLiu, JGen_US
dc.date.accessioned2012-08-08T08:34:18Z-
dc.date.available2012-08-08T08:34:18Z-
dc.date.issued2011en_US
dc.identifier.citationIeee Electron Device Letters, 2011, v. 32 n. 2, p. 122-124en_US
dc.identifier.issn0741-3106en_US
dc.identifier.urihttp://hdl.handle.net/10722/155601-
dc.description.abstractGe MOS capacitors with tri-layer gate dielectric are proposed by using GeON interlayer, TaON sandwich layer, and HfTiON high-k dielectric. Very small capacitance equivalent thickness (0.79 ∼ 0.91 nm) is achieved. Experimental results show that the NO pretreated sample exhibits the best electrical properties, such as low interface-state density (5.4 × 10 11 cm -2eV.1), low gate leakage current density (∼3.16 × 10 -4 Acm -2 at Vg . Vfb = 1 V) and high device reliability. All of these should be attributed to the facts that the NO nitridation could form a GeON interlayer with suitable N content and thus provide an excellent GeON/Ge interface with strong Ge-N bonds, while the TaON sandwich layer could separate Hf and Ge, thus effectively preventing the reaction between them and improving the interface quality and electrical properties of the devices. © 2010 IEEE.en_US
dc.languageengen_US
dc.publisherI E E E. The Journal's web site is located at http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=55en_US
dc.relation.ispartofIEEE Electron Device Lettersen_US
dc.subjectGe Mosen_US
dc.subjectHigh Ken_US
dc.subjectTaon/Geonen_US
dc.subjectTerms-Dual Interlayeren_US
dc.titleImproved interfacial properties of Ge MOS capacitor with high-k dielectric by using TaON/GeON dual interlayeren_US
dc.typeArticleen_US
dc.identifier.emailLai, PT:laip@eee.hku.hken_US
dc.identifier.authorityLai, PT=rp00130en_US
dc.description.naturelink_to_subscribed_fulltexten_US
dc.identifier.doi10.1109/LED.2010.2092749en_US
dc.identifier.scopuseid_2-s2.0-79151480537en_US
dc.relation.referenceshttp://www.scopus.com/mlt/select.url?eid=2-s2.0-79151480537&selection=ref&src=s&origin=recordpageen_US
dc.identifier.volume32en_US
dc.identifier.issue2en_US
dc.identifier.spage122en_US
dc.identifier.epage124en_US
dc.identifier.isiWOS:000286677700004-
dc.publisher.placeUnited Statesen_US
dc.relation.projectHigh-k Gate Dielectrics for High-Performance Germanium MISFET's-
dc.identifier.scopusauthoridJi, F=8238553900en_US
dc.identifier.scopusauthoridXu, JP=35754128700en_US
dc.identifier.scopusauthoridLai, PT=7202946460en_US
dc.identifier.scopusauthoridLi, CX=13906721600en_US
dc.identifier.scopusauthoridLiu, JG=35206342900en_US
dc.identifier.issnl0741-3106-

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