Browsing by Author Hu, Jiang

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TitleAuthor(s)Issue Date
A comparative study on neural network-based prediction of smart community energy consumption
Proceeding/Conference:2017 IEEE SmartWorld Ubiquitous Intelligence and Computing, Advanced and Trusted Computed, Scalable Computing and Communications, Cloud and Big Data Computing, Internet of People and Smart City Innovation, SmartWorld/SCALCOM/UIC/ATC/CBDCom/IOP/SCI 2017 - Conference Proceedings
2018
 
2009
A new fast slew buffering algorithm without input slew assumptions
Proceeding/Conference:2007 IEEE Dallas/CAS Workshop on System-on-Chip (SoC): Design, Applications, Integration, and Software, DCAS-07
2007
A new RLC buffer insertion algorithm
Proceeding/Conference:IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD
2006
An efficient algorithm for RLC buffer insertion
Proceeding/Conference:Proceedings - Eighth International Symposium on Quality Electronic Design, ISQED 2007
2007
 
2019
Fast algorithms for slew constrained minimum cost buffering
Proceeding/Conference:Proceedings - Design Automation Conference
2006
 
Fast algorithms for slew-constrained minimum cost buffering
Journal:IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
2007
Gate sizing for cell library-based designs
Proceeding/Conference:Proceedings - Design Automation Conference
2007
 
Gate sizing for cell-library-based designs
Journal:IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
2009
 
Gate sizing for cell-library-based designs
Journal:IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
2009
 
2024
Pattern sensitive placement for manufacturability
Proceeding/Conference:Proceedings of the International Symposium on Physical Design
2007
 
Pattern sensitive placement perturbation for manufacturability
Journal:IEEE Transactions on Very Large Scale Integration (VLSI) Systems
2010
Steiner network construction for timing critical nets
Proceeding/Conference:Proceedings - Design Automation Conference
2006
 
2017
Unified adaptivity optimization of clock and logic signals
Proceeding/Conference:IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD
2007
 
Utilizing redundancy for timing critical interconnect
Journal:IEEE Transactions on Very Large Scale Integration (VLSI) Systems
2007